[llvm] r268036 - [mips][ias] Make section sizes a multiple of the alignment.
Daniel Sanders via llvm-commits
llvm-commits at lists.llvm.org
Mon May 2 07:54:04 PDT 2016
Hi,
It's part of my strategy for enabling IAS by default. I'm currently using objdump and diff to verify that IAS and GAS produce the same objects (within reason, I'm ignoring debug sections for example) and section size rounding had been the source of a lot of noise in the diffs. Making the section sizes match was a key part of finding the double expansion bugs (delay slots being filled twice for -save-temps, and similar), and the initialization order bug (.cprestore not working correctly without -save-temps). Without this change, those bugs would have been very difficult to spot amongst the noise.
Once we're fully on IAS then the slight size saving will be more valuable than the ability to verify IAS and it will make sense to either revert this change or disable it by default. There are some big problems to fix before everything is on IAS though. The main one is that N32 is badly broken in IAS which also prevents N64 from being enabled by default (because the code can't distinguish them yet). It's probably going to take a couple months to fix that assuming all goes well.
_______________________________________
From: Rafael Espíndola [rafael.espindola at gmail.com]
Sent: 29 April 2016 20:58
To: Daniel Sanders
Cc: llvm-commits
Subject: Re: [llvm] r268036 - [mips][ias] Make section sizes a multiple of the alignment.
Why is this needed?
Cheers,
Rafael
On 29 April 2016 at 08:44, Daniel Sanders via llvm-commits
<llvm-commits at lists.llvm.org> wrote:
> Author: dsanders
> Date: Fri Apr 29 07:44:07 2016
> New Revision: 268036
>
> URL: http://llvm.org/viewvc/llvm-project?rev=268036&view=rev
> Log:
> [mips][ias] Make section sizes a multiple of the alignment.
>
> Reviewers: sdardis
>
> Subscribers: dsanders, llvm-commits, sdardis
>
> Differential Revision: http://reviews.llvm.org/D19008
>
> Added:
> llvm/trunk/test/MC/Mips/section-size.s
> Modified:
> llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
> llvm/trunk/test/DebugInfo/Mips/delay-slot.ll
>
> Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp?rev=268036&r1=268035&r2=268036&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp (original)
> +++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp Fri Apr 29 07:44:07 2016
> @@ -518,6 +518,21 @@ void MipsTargetELFStreamer::finish() {
> DataSection.setAlignment(std::max(16u, DataSection.getAlignment()));
> BSSSection.setAlignment(std::max(16u, BSSSection.getAlignment()));
>
> + // Make sections sizes a multiple of the alignment.
> + MCStreamer &OS = getStreamer();
> + for (MCSection &S : MCA) {
> + MCSectionELF &Section = static_cast<MCSectionELF &>(S);
> +
> + unsigned Alignment = Section.getAlignment();
> + if (Alignment) {
> + OS.SwitchSection(&Section);
> + if (Section.UseCodeAlign())
> + OS.EmitCodeAlignment(Alignment, Alignment);
> + else
> + OS.EmitValueToAlignment(Alignment, 0, 1, Alignment);
> + }
> + }
> +
> const FeatureBitset &Features = STI.getFeatureBits();
>
> // Update e_header flags. See the FIXME and comment above in
>
> Modified: llvm/trunk/test/DebugInfo/Mips/delay-slot.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/Mips/delay-slot.ll?rev=268036&r1=268035&r2=268036&view=diff
> ==============================================================================
> --- llvm/trunk/test/DebugInfo/Mips/delay-slot.ll (original)
> +++ llvm/trunk/test/DebugInfo/Mips/delay-slot.ll Fri Apr 29 07:44:07 2016
> @@ -19,7 +19,7 @@
> ; CHECK: 0x000000000000002c 3 0 1 0 0 is_stmt
> ; CHECK: 0x000000000000003c 4 0 1 0 0 is_stmt
> ; CHECK: 0x0000000000000048 5 0 1 0 0 is_stmt
> -; CHECK: 0x0000000000000058 5 0 1 0 0 is_stmt end_sequence
> +; CHECK: 0x0000000000000060 5 0 1 0 0 is_stmt end_sequence
>
>
> target datalayout = "E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64"
>
> Added: llvm/trunk/test/MC/Mips/section-size.s
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/section-size.s?rev=268036&view=auto
> ==============================================================================
> --- llvm/trunk/test/MC/Mips/section-size.s (added)
> +++ llvm/trunk/test/MC/Mips/section-size.s Fri Apr 29 07:44:07 2016
> @@ -0,0 +1,106 @@
> +# RUN: llvm-mc -triple mips-unknown-linux -filetype=obj %s | \
> +# RUN: llvm-readobj -sections | FileCheck %s
> + .section ".talign1", "ax"
> + .p2align 4
> +t1: .byte 1
> +
> + .section ".talign2", "ax"
> + .p2align 3
> +t2: addiu $2, $2, 1
> + addiu $2, $2, 1
> +
> + .section ".talign3", "ax"
> + .p2align 3
> +t3: addiu $2, $2, 1
> +
> + .section ".talign4", "ax"
> +t4: .byte 1
> +
> + .section ".dalign1", "a"
> + .p2align 4
> +d1: .byte 1
> +
> + .section ".dalign2", "a"
> + .p2align 3
> +d2: .word 1
> + .word 2
> +
> + .section ".dalign3", "a"
> + .p2align 3
> +d3: .word 1
> +
> + .section ".dalign4", "a"
> +d4: .byte 1
> +
> + .section ".dalign5", "a"
> + .p2align 16
> +d5: .word 1
> +
> + .section ".nalign1", ""
> + .p2align 4
> +n1: .byte 1
> +
> + .section ".nalign2", ""
> + .p2align 3
> +n2: .word 1
> + .word 2
> +
> + .section ".nalign3", ""
> + .p2align 3
> +n3: .word 1
> +
> + .section ".nalign4", ""
> +n4: .byte 1
> +
> +# CHECK-LABEL: Name: .talign1
> +# CHECK: Size: 16
> +# CHECK: AddressAlignment: 16
> +# CHECK-LABEL: }
> +# CHECK-LABEL: Name: .talign2
> +# CHECK: Size: 8
> +# CHECK: AddressAlignment: 8
> +# CHECK-LABEL: }
> +# CHECK-LABEL: Name: .talign3
> +# CHECK: Size: 8
> +# CHECK: AddressAlignment: 8
> +# CHECK-LABEL: }
> +# CHECK-LABEL: Name: .talign4
> +# CHECK: Size: 1
> +# CHECK: AddressAlignment: 1
> +# CHECK-LABEL: }
> +# CHECK-LABEL: Name: .dalign1
> +# CHECK: Size: 16
> +# CHECK: AddressAlignment: 16
> +# CHECK-LABEL: }
> +# CHECK-LABEL: Name: .dalign2
> +# CHECK: Size: 8
> +# CHECK: AddressAlignment: 8
> +# CHECK-LABEL: }
> +# CHECK-LABEL: Name: .dalign3
> +# CHECK: Size: 8
> +# CHECK: AddressAlignment: 8
> +# CHECK-LABEL: }
> +# CHECK-LABEL: Name: .dalign4
> +# CHECK: Size: 1
> +# CHECK: AddressAlignment: 1
> +# CHECK-LABEL: }
> +# CHECK-LABEL: Name: .dalign5
> +# CHECK: Size: 65536
> +# CHECK: AddressAlignment: 65536
> +# CHECK-LABEL: }
> +# CHECK-LABEL: Name: .nalign1
> +# CHECK: Size: 16
> +# CHECK: AddressAlignment: 16
> +# CHECK-LABEL: }
> +# CHECK-LABEL: Name: .nalign2
> +# CHECK: Size: 8
> +# CHECK: AddressAlignment: 8
> +# CHECK-LABEL: }
> +# CHECK-LABEL: Name: .nalign3
> +# CHECK: Size: 8
> +# CHECK: AddressAlignment: 8
> +# CHECK-LABEL: }
> +# CHECK-LABEL: Name: .nalign4
> +# CHECK: Size: 1
> +# CHECK: AddressAlignment: 1
> +# CHECK-LABEL: }
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at lists.llvm.org
> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits
More information about the llvm-commits
mailing list