[PATCH] D19797: [Sparc] Constification of TargetMachine arguments
Jacob Baungard Hansen via llvm-commits
llvm-commits at lists.llvm.org
Mon May 2 02:23:15 PDT 2016
jacob_hansen created this revision.
jacob_hansen added reviewers: echristo, jyknight.
jacob_hansen added a subscriber: llvm-commits.
Herald added subscribers: joker.eph, jyknight.
This patch changes the TargetMachine arguments to be const. This is required for {D19265}, and was requested to be done in a separate patch.
http://reviews.llvm.org/D19797
Files:
lib/Target/Sparc/SparcISelLowering.cpp
lib/Target/Sparc/SparcISelLowering.h
lib/Target/Sparc/SparcSubtarget.cpp
lib/Target/Sparc/SparcSubtarget.h
Index: lib/Target/Sparc/SparcSubtarget.h
===================================================================
--- lib/Target/Sparc/SparcSubtarget.h
+++ lib/Target/Sparc/SparcSubtarget.h
@@ -46,7 +46,7 @@
public:
SparcSubtarget(const Triple &TT, const std::string &CPU,
- const std::string &FS, TargetMachine &TM, bool is64bit);
+ const std::string &FS, const TargetMachine &TM, bool is64bit);
const SparcInstrInfo *getInstrInfo() const override { return &InstrInfo; }
const TargetFrameLowering *getFrameLowering() const override {
Index: lib/Target/Sparc/SparcSubtarget.cpp
===================================================================
--- lib/Target/Sparc/SparcSubtarget.cpp
+++ lib/Target/Sparc/SparcSubtarget.cpp
@@ -50,7 +50,7 @@
}
SparcSubtarget::SparcSubtarget(const Triple &TT, const std::string &CPU,
- const std::string &FS, TargetMachine &TM,
+ const std::string &FS, const TargetMachine &TM,
bool is64Bit)
: SparcGenSubtargetInfo(TT, CPU, FS), TargetTriple(TT), Is64Bit(is64Bit),
InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this),
Index: lib/Target/Sparc/SparcISelLowering.h
===================================================================
--- lib/Target/Sparc/SparcISelLowering.h
+++ lib/Target/Sparc/SparcISelLowering.h
@@ -54,7 +54,7 @@
class SparcTargetLowering : public TargetLowering {
const SparcSubtarget *Subtarget;
public:
- SparcTargetLowering(TargetMachine &TM, const SparcSubtarget &STI);
+ SparcTargetLowering(const TargetMachine &TM, const SparcSubtarget &STI);
SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
/// computeKnownBitsForTargetNode - Determine which of the bits specified
Index: lib/Target/Sparc/SparcISelLowering.cpp
===================================================================
--- lib/Target/Sparc/SparcISelLowering.cpp
+++ lib/Target/Sparc/SparcISelLowering.cpp
@@ -1448,7 +1448,7 @@
}
}
-SparcTargetLowering::SparcTargetLowering(TargetMachine &TM,
+SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM,
const SparcSubtarget &STI)
: TargetLowering(TM), Subtarget(&STI) {
MVT PtrVT = MVT::getIntegerVT(8 * TM.getPointerSize());
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