[PATCH] D18602: AMDGPU/SI: Enable the post-ra scheduler

[Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL268143: AMDGPU/SI: Enable the post-ra scheduler (authored by tstellar).

Changed prior to commit:
  http://reviews.llvm.org/D18602?vs=55051&id=55691#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D18602

Files:
  llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  llvm/trunk/lib/Target/AMDGPU/CMakeLists.txt
  llvm/trunk/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
  llvm/trunk/lib/Target/AMDGPU/GCNHazardRecognizer.h
  llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.h
  llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.cpp
  llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.h
  llvm/trunk/lib/Target/AMDGPU/SISchedule.td
  llvm/trunk/test/CodeGen/AMDGPU/addrspacecast.ll
  llvm/trunk/test/CodeGen/AMDGPU/and.ll
  llvm/trunk/test/CodeGen/AMDGPU/captured-frame-index.ll
  llvm/trunk/test/CodeGen/AMDGPU/fract.f64.ll
  llvm/trunk/test/CodeGen/AMDGPU/half.ll
  llvm/trunk/test/CodeGen/AMDGPU/insert_vector_elt.ll
  llvm/trunk/test/CodeGen/AMDGPU/invariant-load-no-alias-store.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.AMDGPU.rsq.clamped.f64.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.AMDGPU.rsq.clamped.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.atomic.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.clamp.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.round.f64.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.round.ll
  llvm/trunk/test/CodeGen/AMDGPU/mad-combine.ll
  llvm/trunk/test/CodeGen/AMDGPU/move-addr64-rsrc-dead-subreg-writes.ll
  llvm/trunk/test/CodeGen/AMDGPU/setcc-opt.ll
  llvm/trunk/test/CodeGen/AMDGPU/shift-and-i128-ubfe.ll
  llvm/trunk/test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll
  llvm/trunk/test/CodeGen/AMDGPU/shift-i64-opts.ll
  llvm/trunk/test/CodeGen/AMDGPU/si-spill-sgpr-stack.ll
  llvm/trunk/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
  llvm/trunk/test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll
  llvm/trunk/test/CodeGen/AMDGPU/trunc.ll
  llvm/trunk/test/CodeGen/AMDGPU/uniform-cfg.ll
  llvm/trunk/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot-compute.ll
  llvm/trunk/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot.ll

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