[PATCH] D19745: AMDGPU/SI: Use v_readfirstlane_b32 when restoring SGPRs spilled to scratch

[Tom Stellard via llvm-commits]

tstellarAMD created this revision.
tstellarAMD added a reviewer: arsenm.
tstellarAMD added a subscriber: llvm-commits.
Herald added a subscriber: arsenm.

We were using v_readlane_b32 with the lane set to zero, but this won't
work if thread 0 is not active.

http://reviews.llvm.org/D19745

Files:
  lib/Target/AMDGPU/SIRegisterInfo.cpp

Index: lib/Target/AMDGPU/SIRegisterInfo.cpp
===================================================================
--- lib/Target/AMDGPU/SIRegisterInfo.cpp
+++ lib/Target/AMDGPU/SIRegisterInfo.cpp
@@ -589,9 +589,8 @@
                   .addImm(i * 4)                          // offset
                   .addMemOperand(MMO);
           BuildMI(*MBB, MI, DL,
-                  TII->getMCOpcodeFromPseudo(AMDGPU::V_READLANE_B32), SubReg)
+                  TII->get(AMDGPU::V_READFIRSTLANE_B32), SubReg)
                   .addReg(TmpReg, RegState::Kill)
-                  .addImm(0)
                   .addReg(MI->getOperand(0).getReg(), RegState::ImplicitDefine);
         }
       }


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