[llvm] r268012 - [mips][microMIPS] Fix offsets for LLE, LWE, SBE, SCE and SHE instructions
Zlatko Buljan via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 29 01:36:55 PDT 2016
Author: zbuljan
Date: Fri Apr 29 03:36:54 2016
New Revision: 268012
URL: http://llvm.org/viewvc/llvm-project?rev=268012&view=rev
Log:
[mips][microMIPS] Fix offsets for LLE, LWE, SBE, SCE and SHE instructions
Differential Revision: http://reviews.llvm.org/D18645
Modified:
llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
llvm/trunk/lib/Target/Mips/MicroMips32r6InstrInfo.td
llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td
llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
llvm/trunk/test/MC/Mips/eva/invalid-noeva-wrong-error.s
llvm/trunk/test/MC/Mips/eva/invalid.s
llvm/trunk/test/MC/Mips/eva/invalid_R6.s
llvm/trunk/test/MC/Mips/micromips/invalid.s
llvm/trunk/test/MC/Mips/micromips32r6/invalid.s
llvm/trunk/test/MC/Mips/micromips64r6/invalid.s
Modified: llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp?rev=268012&r1=268011&r2=268012&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp Fri Apr 29 03:36:54 2016
@@ -1072,10 +1072,6 @@ public:
isShiftedInt<Bits, ShiftAmount>(getConstantMemOff()) &&
getMemBase()->isGPRAsmReg();
}
- template <unsigned Bits> bool isMemWithSimmOffsetGPR() const {
- return isMem() && isConstantMemOff() && isInt<Bits>(getConstantMemOff()) &&
- getMemBase()->isGPRAsmReg();
- }
bool isMemWithGRPMM16Base() const {
return isMem() && getMemBase()->isMM16AsmReg();
}
@@ -3815,9 +3811,6 @@ bool MipsAsmParser::MatchAndEmitInstruct
case Match_MemSImm9:
return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo),
"expected memory with 9-bit signed offset");
- case Match_MemGPSImm9:
- return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo),
- "expected memory with $gp and 9-bit signed offset");
case Match_MemSImm10:
return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo),
"expected memory with 10-bit signed offset");
Modified: llvm/trunk/lib/Target/Mips/MicroMips32r6InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MicroMips32r6InstrInfo.td?rev=268012&r1=268011&r2=268012&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MicroMips32r6InstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MicroMips32r6InstrInfo.td Fri Apr 29 03:36:54 2016
@@ -949,7 +949,7 @@ class SB_MMR6_DESC : STORE_MMR6_DESC_BAS
class STORE_EVA_MMR6_DESC_BASE<string instr_asm, RegisterOperand RO>
: MMR6Arch<instr_asm>, MipsR6Inst {
dag OutOperandList = (outs);
- dag InOperandList = (ins RO:$rt, mem_mm_9:$addr);
+ dag InOperandList = (ins RO:$rt, mem_simm9:$addr);
string AsmString = !strconcat(instr_asm, "\t$rt, $addr");
string DecoderMethod = "DecodeStoreEvaOpMM";
bit mayStore = 1;
@@ -961,7 +961,7 @@ class SHE_MMR6_DESC : STORE_EVA_MMR6_DES
class LOAD_WORD_EVA_MMR6_DESC_BASE<string instr_asm, RegisterOperand RO> :
MMR6Arch<instr_asm>, MipsR6Inst {
dag OutOperandList = (outs RO:$rt);
- dag InOperandList = (ins mem_mm_12:$addr);
+ dag InOperandList = (ins mem_simm9:$addr);
string AsmString = !strconcat(instr_asm, "\t$rt, $addr");
string DecoderMethod = "DecodeMemMMImm9";
bit mayLoad = 1;
Modified: llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td?rev=268012&r1=268011&r2=268012&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td Fri Apr 29 03:36:54 2016
@@ -251,7 +251,7 @@ class LLBaseMM<string opstr, RegisterOpe
}
class LLEBaseMM<string opstr, RegisterOperand RO> :
- InstSE<(outs RO:$rt), (ins mem_mm_12:$addr),
+ InstSE<(outs RO:$rt), (ins mem_simm9:$addr),
!strconcat(opstr, "\t$rt, $addr"), [], NoItinerary, FrmI> {
let DecoderMethod = "DecodeMemMMImm9";
let mayLoad = 1;
@@ -266,7 +266,7 @@ class SCBaseMM<string opstr, RegisterOpe
}
class SCEBaseMM<string opstr, RegisterOperand RO> :
- InstSE<(outs RO:$dst), (ins RO:$rt, mem_mm_12:$addr),
+ InstSE<(outs RO:$dst), (ins RO:$rt, mem_simm9:$addr),
!strconcat(opstr, "\t$rt, $addr"), [], NoItinerary, FrmI> {
let DecoderMethod = "DecodeMemMMImm9";
let mayStore = 1;
@@ -738,10 +738,13 @@ let DecoderNamespace = "MicroMips", Pred
def LBuE_MM : Load<"lbue", GPR32Opnd>, POOL32C_LHUE_FM_MM<0x18, 0x6, 0x0>;
def LHE_MM : Load<"lhe", GPR32Opnd>, POOL32C_LHUE_FM_MM<0x18, 0x6, 0x5>;
def LHuE_MM : Load<"lhue", GPR32Opnd>, POOL32C_LHUE_FM_MM<0x18, 0x6, 0x1>;
- def LWE_MM : Load<"lwe", GPR32Opnd>, POOL32C_LHUE_FM_MM<0x18, 0x6, 0x7>;
- def SBE_MM : Store<"sbe", GPR32Opnd>, POOL32C_LHUE_FM_MM<0x18, 0xa, 0x4>;
- def SHE_MM : Store<"she", GPR32Opnd>, POOL32C_LHUE_FM_MM<0x18, 0xa, 0x5>;
- def SWE_MM : StoreMemory<"swe", GPR32Opnd, mem_simm9gpr>,
+ def LWE_MM : LoadMemory<"lwe", GPR32Opnd, mem_simm9>,
+ POOL32C_LHUE_FM_MM<0x18, 0x6, 0x7>;
+ def SBE_MM : StoreMemory<"sbe", GPR32Opnd, mem_simm9>,
+ POOL32C_LHUE_FM_MM<0x18, 0xa, 0x4>;
+ def SHE_MM : StoreMemory<"she", GPR32Opnd, mem_simm9>,
+ POOL32C_LHUE_FM_MM<0x18, 0xa, 0x5>;
+ def SWE_MM : StoreMemory<"swe", GPR32Opnd, mem_simm9>,
POOL32C_LHUE_FM_MM<0x18, 0xa, 0x7>;
}
Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.td?rev=268012&r1=268011&r2=268012&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.td Fri Apr 29 03:36:54 2016
@@ -877,15 +877,6 @@ foreach I = {1, 2, 3} in
let DiagnosticType = "MemSImm10Lsl" # I;
}
-def MipsMemSimm9GPRAsmOperand : AsmOperandClass {
- let Name = "MemOffsetSimm9GPR";
- let SuperClasses = [MipsMemAsmOperand];
- let RenderMethod = "addMemOperands";
- let ParserMethod = "parseMemOperand";
- let PredicateMethod = "isMemWithSimmOffsetGPR<9>";
- let DiagnosticType = "MemGPSImm9";
-}
-
def MipsMemSimm11AsmOperand : AsmOperandClass {
let Name = "MemOffsetSimm11";
let SuperClasses = [MipsMemAsmOperand];
@@ -955,12 +946,6 @@ foreach I = {1, 2, 3} in
!cast<AsmOperandClass>("MipsMemSimm10Lsl" # I # "AsmOperand");
}
-def mem_simm9gpr : mem_generic {
- let MIOperandInfo = (ops ptr_rc, simm9);
- let EncoderMethod = "getMemEncoding";
- let ParserMatchClass = MipsMemSimm9GPRAsmOperand;
-}
-
def mem_simm11 : mem_generic {
let MIOperandInfo = (ops ptr_rc, simm11);
let EncoderMethod = "getMemEncoding";
@@ -1147,15 +1132,21 @@ class LoadUpper<string opstr, RegisterOp
}
// Memory Load/Store
-class Load<string opstr, DAGOperand RO, SDPatternOperator OpNode = null_frag,
- InstrItinClass Itin = NoItinerary, ComplexPattern Addr = addr> :
- InstSE<(outs RO:$rt), (ins mem:$addr), !strconcat(opstr, "\t$rt, $addr"),
+class LoadMemory<string opstr, DAGOperand RO, DAGOperand MO,
+ SDPatternOperator OpNode = null_frag,
+ InstrItinClass Itin = NoItinerary,
+ ComplexPattern Addr = addr> :
+ InstSE<(outs RO:$rt), (ins MO:$addr), !strconcat(opstr, "\t$rt, $addr"),
[(set RO:$rt, (OpNode Addr:$addr))], Itin, FrmI, opstr> {
let DecoderMethod = "DecodeMem";
let canFoldAsLoad = 1;
let mayLoad = 1;
}
+class Load<string opstr, DAGOperand RO, SDPatternOperator OpNode = null_frag,
+ InstrItinClass Itin = NoItinerary, ComplexPattern Addr = addr> :
+ LoadMemory<opstr, RO, mem, OpNode, Itin, Addr>;
+
class StoreMemory<string opstr, DAGOperand RO, DAGOperand MO,
SDPatternOperator OpNode = null_frag,
InstrItinClass Itin = NoItinerary, ComplexPattern Addr = addr> :
Modified: llvm/trunk/test/MC/Mips/eva/invalid-noeva-wrong-error.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/eva/invalid-noeva-wrong-error.s?rev=268012&r1=268011&r2=268012&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/eva/invalid-noeva-wrong-error.s (original)
+++ llvm/trunk/test/MC/Mips/eva/invalid-noeva-wrong-error.s Fri Apr 29 03:36:54 2016
@@ -58,9 +58,9 @@
she $14,255($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
she $14,-256($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
she $9,235($11) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
- swe $ra,255($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with $gp and 9-bit signed offset
- swe $ra,-256($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with $gp and 9-bit signed offset
- swe $ra,-53($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with $gp and 9-bit signed offset
+ swe $ra,255($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
+ swe $ra,-256($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
+ swe $ra,-53($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
swle $9,255($s1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
swle $10,-256($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
swle $8,131($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
Modified: llvm/trunk/test/MC/Mips/eva/invalid.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/eva/invalid.s?rev=268012&r1=268011&r2=268012&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/eva/invalid.s (original)
+++ llvm/trunk/test/MC/Mips/eva/invalid.s Fri Apr 29 03:36:54 2016
@@ -9,3 +9,27 @@
cachee 32, 255($7) # CHECK: :[[@LINE]]:12: error: expected 5-bit unsigned immediate
prefe -1, 255($7) # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
prefe 32, 255($7) # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
+ lle $33, 8($5) # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
+ lle $4, 8($33) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
+ lle $4, 512($5) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
+ lle $4, -513($5) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
+ lwe $33, 8($5) # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
+ lwe $4, 8($33) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
+ lwe $4, 512($5) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
+ lwe $4, -513($5) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
+ sbe $33, 8($5) # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
+ sbe $4, 8($33) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
+ sbe $4, 512($5) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
+ sbe $4, -513($5) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
+ sce $33, 8($5) # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
+ sce $4, 8($33) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
+ sce $4, 512($5) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
+ sce $4, -513($5) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
+ she $33, 8($5) # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
+ she $4, 8($33) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
+ she $4, 512($5) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
+ she $4, -513($5) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
+ swe $33, 8($4) # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
+ swe $5, 8($34) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
+ swe $5, 512($4) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
+ swe $5, -513($4) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
Modified: llvm/trunk/test/MC/Mips/eva/invalid_R6.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/eva/invalid_R6.s?rev=268012&r1=268011&r2=268012&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/eva/invalid_R6.s (original)
+++ llvm/trunk/test/MC/Mips/eva/invalid_R6.s Fri Apr 29 03:36:54 2016
@@ -18,3 +18,27 @@
swre $s4,255($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
swre $s4,-256($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
swre $s2,86($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
+ lle $33, 8($5) # CHECK: :[[@LINE]]:19: error: invalid operand for instruction
+ lle $4, 8($33) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
+ lle $4, 512($5) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
+ lle $4, -513($5) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
+ lwe $33, 8($5) # CHECK: :[[@LINE]]:19: error: invalid operand for instruction
+ lwe $4, 8($33) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
+ lwe $4, 512($5) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
+ lwe $4, -513($5) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
+ sbe $33, 8($5) # CHECK: :[[@LINE]]:19: error: invalid operand for instruction
+ sbe $4, 8($33) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
+ sbe $4, 512($5) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
+ sbe $4, -513($5) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
+ sce $33, 8($5) # CHECK: :[[@LINE]]:19: error: invalid operand for instruction
+ sce $4, 8($33) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
+ sce $4, 512($5) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
+ sce $4, -513($5) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
+ she $33, 8($5) # CHECK: :[[@LINE]]:19: error: invalid operand for instruction
+ she $4, 8($33) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
+ she $4, 512($5) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
+ she $4, -513($5) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
+ swe $33, 8($4) # CHECK: :[[@LINE]]:19: error: invalid operand for instruction
+ swe $5, 8($34) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
+ swe $5, 512($4) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
+ swe $5, -513($4) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
Modified: llvm/trunk/test/MC/Mips/micromips/invalid.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/micromips/invalid.s?rev=268012&r1=268011&r2=268012&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/micromips/invalid.s (original)
+++ llvm/trunk/test/MC/Mips/micromips/invalid.s Fri Apr 29 03:36:54 2016
@@ -50,10 +50,32 @@
srl $2, $3, 32 # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
sync -1 # CHECK: :[[@LINE]]:8: error: expected 5-bit unsigned immediate
sync 32 # CHECK: :[[@LINE]]:8: error: expected 5-bit unsigned immediate
- swe $2, -513($gp) # CHECK: :[[@LINE]]:11: error: expected memory with $gp and 9-bit signed offset
- swe $2, 512($gp) # CHECK: :[[@LINE]]:11: error: expected memory with $gp and 9-bit signed offset
+ swe $2, -513($gp) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ swe $2, 512($gp) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ swe $33, 8($gp) # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
+ swe $2, 8($33) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
sll $3, -1 # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
sll $3, 32 # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
sra $3, -1 # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
sra $3, 32 # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
srl $3, -1 # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
+ lle $33, 8($5) # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
+ lle $4, 8($33) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ lle $4, 512($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ lle $4, -513($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ lwe $33, 8($5) # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
+ lwe $4, 8($33) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ lwe $4, 512($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ lwe $4, -513($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ sbe $33, 8($5) # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
+ sbe $4, 8($33) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ sbe $4, 512($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ sbe $4, -513($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ sce $33, 8($5) # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
+ sce $4, 8($33) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ sce $4, 512($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ sce $4, -513($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ she $33, 8($5) # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
+ she $4, 8($33) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ she $4, 512($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ she $4, -513($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
Modified: llvm/trunk/test/MC/Mips/micromips32r6/invalid.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/micromips32r6/invalid.s?rev=268012&r1=268011&r2=268012&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/micromips32r6/invalid.s (original)
+++ llvm/trunk/test/MC/Mips/micromips32r6/invalid.s Fri Apr 29 03:36:54 2016
@@ -36,8 +36,8 @@
ei $32 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
swe $33, 8($4) # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
# FIXME: This ought to point at the $34 but memory is treated as one operand.
- swe $5, 8($34) # CHECK: :[[@LINE]]:11: error: expected memory with $gp and 9-bit signed offset
- swe $5, 512($4) # CHECK: :[[@LINE]]:11: error: expected memory with $gp and 9-bit signed offset
+ swe $5, 8($34) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ swe $5, 512($4) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
lbu16 $9, 8($16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
lbu16 $3, -2($16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
lbu16 $3, -2($16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
@@ -151,3 +151,24 @@
sra $3, 32 # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
srl $3, -1 # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
srl $3, 32 # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
+ lle $33, 8($5) # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
+ lle $4, 8($33) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ lle $4, 512($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ lle $4, -513($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ lwe $33, 8($5) # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
+ lwe $4, 8($33) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ lwe $4, 512($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ lwe $4, -513($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ sbe $33, 8($5) # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
+ sbe $4, 8($33) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ sbe $4, 512($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ sbe $4, -513($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ sce $33, 8($5) # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
+ sce $4, 8($33) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ sce $4, 512($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ sce $4, -513($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ she $33, 8($5) # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
+ she $4, 8($33) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ she $4, 512($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ she $4, -513($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ swe $5, -513($4) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
Modified: llvm/trunk/test/MC/Mips/micromips64r6/invalid.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/micromips64r6/invalid.s?rev=268012&r1=268011&r2=268012&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/micromips64r6/invalid.s (original)
+++ llvm/trunk/test/MC/Mips/micromips64r6/invalid.s Fri Apr 29 03:36:54 2016
@@ -180,3 +180,27 @@
dneg 4 # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
dnegu $1, 3 # CHECK: :[[@LINE]]:13: error: invalid operand for instruction
dnegu 7 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
+ lle $33, 8($5) # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
+ lle $4, 8($33) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ lle $4, 512($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ lle $4, -513($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ lwe $33, 8($5) # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
+ lwe $4, 8($33) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ lwe $4, 512($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ lwe $4, -513($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ sbe $33, 8($5) # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
+ sbe $4, 8($33) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ sbe $4, 512($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ sbe $4, -513($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ sce $33, 8($5) # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
+ sce $4, 8($33) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ sce $4, 512($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ sce $4, -513($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ she $33, 8($5) # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
+ she $4, 8($33) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ she $4, 512($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ she $4, -513($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ swe $33, 8($4) # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
+ swe $5, 8($34) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ swe $5, 512($4) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+ swe $5, -513($4) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
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