[llvm] r267943 - [PowerPC] Fix the EH_SjLj_Setup pseudo.
Marcin Koscielnicki via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 28 14:24:37 PDT 2016
Author: koriakin
Date: Thu Apr 28 16:24:37 2016
New Revision: 267943
URL: http://llvm.org/viewvc/llvm-project?rev=267943&view=rev
Log:
[PowerPC] Fix the EH_SjLj_Setup pseudo.
This instruction is just a control flow marker - it should not
actually exist in the object file. Unfortunately, nothing catches
it before it gets to AsmPrinter. If integrated assembler is used,
it's considered to be a normal 4-byte instruction, and emitted as
an all-0 word, crashing the program. With external assembler,
a comment is emitted.
Fixed by setting Size to 0 and handling it in MCCodeEmitter - this
means the comment will still be emitted if integrated assembler
is not used.
This broke an ASan test, which has been disabled for a long time
as a result (see the discussion on D19657). We can reenable it
once this lands.
Added:
llvm/trunk/test/CodeGen/PowerPC/2016-04-28-setjmp.ll
Modified:
llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
Modified: llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp?rev=267943&r1=267942&r2=267943&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp Thu Apr 28 16:24:37 2016
@@ -113,6 +113,8 @@ public:
// Output the constant in big/little endian byte order.
unsigned Size = Desc.getSize();
switch (Size) {
+ case 0:
+ break;
case 4:
if (IsLittleEndian) {
support::endian::Writer<support::little>(OS).write<uint32_t>(Bits);
Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=267943&r1=267942&r2=267943&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Thu Apr 28 16:24:37 2016
@@ -1397,7 +1397,10 @@ let hasSideEffects = 1, isBarrier = 1, u
Requires<[In32BitMode]>;
}
-let isBranch = 1, isTerminator = 1 in {
+// This pseudo is never removed from the function, as it serves as
+// a terminator. Size is set to 0 to prevent the builtin assembler
+// from emitting it.
+let isBranch = 1, isTerminator = 1, Size = 0 in {
def EH_SjLj_Setup : Pseudo<(outs), (ins directbrtarget:$dst),
"#EH_SjLj_Setup\t$dst", []>;
}
Added: llvm/trunk/test/CodeGen/PowerPC/2016-04-28-setjmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/2016-04-28-setjmp.ll?rev=267943&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/2016-04-28-setjmp.ll (added)
+++ llvm/trunk/test/CodeGen/PowerPC/2016-04-28-setjmp.ll Thu Apr 28 16:24:37 2016
@@ -0,0 +1,48 @@
+; RUN: llc -filetype=obj <%s | llvm-objdump --disassemble - | FileCheck %s
+target datalayout = "e-m:e-i64:64-n32:64"
+target triple = "powerpc64le-unknown-linux-gnu"
+
+ at ptr = common global i8* null, align 8
+
+; Verify there's no junk between these two instructions from misemitted
+; EH_SjLj_Setup.
+
+; CHECK: li 3, 1
+; CHECK-NEXT: b .+4
+
+define void @h() nounwind {
+ %1 = load i8**, i8*** bitcast (i8** @ptr to i8***), align 8
+ %2 = tail call i8* @llvm.frameaddress(i32 0)
+ store i8* %2, i8** %1, align 8
+ %3 = tail call i8* @llvm.stacksave()
+ %4 = getelementptr inbounds i8*, i8** %1, i64 2
+ store i8* %3, i8** %4, align 8
+ %5 = bitcast i8** %1 to i8*
+ %6 = tail call i32 @llvm.eh.sjlj.setjmp(i8* %5)
+ %7 = icmp eq i32 %6, 0
+ br i1 %7, label %9, label %8
+
+; <label>:8: ; preds = %0
+ tail call void @g()
+ br label %10
+
+; <label>:9: ; preds = %0
+ tail call void @f()
+ br label %10
+
+; <label>:10: ; preds = %9, %8
+ ret void
+}
+
+; Function Attrs: nounwind readnone
+declare i8* @llvm.frameaddress(i32)
+
+; Function Attrs: nounwind
+declare i8* @llvm.stacksave()
+
+; Function Attrs: nounwind
+declare i32 @llvm.eh.sjlj.setjmp(i8*)
+
+declare void @g()
+
+declare void @f()
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