[PATCH] D19686: [PowerPC] Fix the EH_SjLj_Setup pseudo.

Marcin Koƛcielnicki via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 28 14:19:30 PDT 2016


koriakin updated this revision to Diff 55485.
koriakin added a comment.

Added comment and test.


Repository:
  rL LLVM

http://reviews.llvm.org/D19686

Files:
  lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
  lib/Target/PowerPC/PPCInstrInfo.td
  test/CodeGen/PowerPC/2016-04-28-setjmp.ll

Index: test/CodeGen/PowerPC/2016-04-28-setjmp.ll
===================================================================
--- /dev/null
+++ test/CodeGen/PowerPC/2016-04-28-setjmp.ll
@@ -0,0 +1,48 @@
+; RUN: llc -filetype=obj <%s | llvm-objdump --disassemble - | FileCheck %s
+target datalayout = "e-m:e-i64:64-n32:64"
+target triple = "powerpc64le-unknown-linux-gnu"
+
+ at ptr = common global i8* null, align 8
+
+; Verify there's no junk between these two instructions from misemitted
+; EH_SjLj_Setup.
+
+; CHECK: li 3, 1
+; CHECK-NEXT: b .+4
+
+define void @h() nounwind {
+  %1 = load i8**, i8*** bitcast (i8** @ptr to i8***), align 8
+  %2 = tail call i8* @llvm.frameaddress(i32 0)
+  store i8* %2, i8** %1, align 8
+  %3 = tail call i8* @llvm.stacksave()
+  %4 = getelementptr inbounds i8*, i8** %1, i64 2
+  store i8* %3, i8** %4, align 8
+  %5 = bitcast i8** %1 to i8*
+  %6 = tail call i32 @llvm.eh.sjlj.setjmp(i8* %5)
+  %7 = icmp eq i32 %6, 0
+  br i1 %7, label %9, label %8
+
+; <label>:8:                                      ; preds = %0
+  tail call void @g()
+  br label %10
+
+; <label>:9:                                      ; preds = %0
+  tail call void @f()
+  br label %10
+
+; <label>:10:                                     ; preds = %9, %8
+  ret void
+}
+
+; Function Attrs: nounwind readnone
+declare i8* @llvm.frameaddress(i32)
+
+; Function Attrs: nounwind
+declare i8* @llvm.stacksave()
+
+; Function Attrs: nounwind
+declare i32 @llvm.eh.sjlj.setjmp(i8*)
+
+declare void @g()
+
+declare void @f()
Index: lib/Target/PowerPC/PPCInstrInfo.td
===================================================================
--- lib/Target/PowerPC/PPCInstrInfo.td
+++ lib/Target/PowerPC/PPCInstrInfo.td
@@ -1403,7 +1403,10 @@
                           Requires<[In32BitMode]>;
 }
 
-let isBranch = 1, isTerminator = 1 in {
+// This pseudo is never removed from the function, as it serves as
+// a terminator.  Size is set to 0 to prevent the builtin assembler
+// from emitting it.
+let isBranch = 1, isTerminator = 1, Size = 0 in {
   def EH_SjLj_Setup : Pseudo<(outs), (ins directbrtarget:$dst),
                         "#EH_SjLj_Setup\t$dst", []>;
 }
Index: lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
===================================================================
--- lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
+++ lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
@@ -113,6 +113,8 @@
     // Output the constant in big/little endian byte order.
     unsigned Size = Desc.getSize();
     switch (Size) {
+    case 0:
+      break;
     case 4:
       if (IsLittleEndian) {
         support::endian::Writer<support::little>(OS).write<uint32_t>(Bits);


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