[PATCH] D19686: [PowerPC] Fix the EH_SjLj_Setup pseudo.
Marcin KoĆcielnicki via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 28 13:52:39 PDT 2016
koriakin created this revision.
koriakin added reviewers: hfinkel, kbarton.
koriakin added a subscriber: llvm-commits.
koriakin set the repository for this revision to rL LLVM.
This instruction is just a control flow marker - it should not
actually exist in the object file. Unfortunately, nothing catches
it before it gets to AsmPrinter. If integrated assembler is used,
it's considered to be a normal 4-byte instruction, and emitted as
an all-0 word, crashing the program. With external assembler,
a comment is emitted.
Fixed by setting Size to 0 and handling it in MCCodeEmitter - this
means the comment will still be emitted if integrated assembler
is not used.
This broke an ASan test, which has been disabled for a long time
as a result (see the discussion on D19657). We can reenable it
once this lands.
Repository:
rL LLVM
http://reviews.llvm.org/D19686
Files:
lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
lib/Target/PowerPC/PPCInstrInfo.td
Index: lib/Target/PowerPC/PPCInstrInfo.td
===================================================================
--- lib/Target/PowerPC/PPCInstrInfo.td
+++ lib/Target/PowerPC/PPCInstrInfo.td
@@ -1403,7 +1403,7 @@
Requires<[In32BitMode]>;
}
-let isBranch = 1, isTerminator = 1 in {
+let isBranch = 1, isTerminator = 1, Size = 0 in {
def EH_SjLj_Setup : Pseudo<(outs), (ins directbrtarget:$dst),
"#EH_SjLj_Setup\t$dst", []>;
}
Index: lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
===================================================================
--- lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
+++ lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
@@ -113,6 +113,8 @@
// Output the constant in big/little endian byte order.
unsigned Size = Desc.getSize();
switch (Size) {
+ case 0:
+ break;
case 4:
if (IsLittleEndian) {
support::endian::Writer<support::little>(OS).write<uint32_t>(Bits);
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