[PATCH] D19261: X86 _comi_ intrinsics - Fixed lowering
David Kreitzer via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 27 13:02:26 PDT 2016
DavidKreitzer added a comment.
Hi Elena,
You didn't answer my question about the vpmovzx changes. Are they somehow related to the comi changes?
Thanks,
-Dave
================
Comment at: ../lib/Target/X86/X86ISelLowering.cpp:17496
@@ -17483,3 +17495,3 @@
return DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, SetCC);
}
case COMI_RM: { // Comparison intrinsics with Sae
----------------
This still isn't quite correct. NaN comparisons will give the wrong results for the [u]comilt and [u]comile intrinsics. They are supposed to behave like the C "<" and "<=" operators, which return false for comparisons involving NaN.
In order to compute _mm_comilt_ss(A, B) with just one SETcc, you need to generate code just like _mm_comigt_ss(B, A).
Did you try running the ex26.c test that I sent you?
Repository:
rL LLVM
http://reviews.llvm.org/D19261
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