[PATCH] D19592: [X86]: Quit promoting 16 bit loads to 32 bit.

[Kevin B. Smith via llvm-commits]

kbsmith1 created this revision.
kbsmith1 added reviewers: spatel, DavidKreitzer.
kbsmith1 added a subscriber: llvm-commits.

This changes ISel so that it will not use any heuristics to promote 16 bit loads into 32 bit loads.
If these promotions are useful, the FixupBWInst pass late in the X86 CodeGen will take care of it.  

http://reviews.llvm.org/D19592

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/half.ll

Index: lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- lib/Target/X86/X86ISelLowering.cpp
+++ lib/Target/X86/X86ISelLowering.cpp
@@ -29645,23 +29645,6 @@
   bool Commute = false;
   switch (Op.getOpcode()) {
   default: break;
-  case ISD::LOAD: {
-    LoadSDNode *LD = cast<LoadSDNode>(Op);
-    // If the non-extending load has a single use and it's not live out, then it
-    // might be folded.
-    if (LD->getExtensionType() == ISD::NON_EXTLOAD /*&&
-                                                     Op.hasOneUse()*/) {
-      for (SDNode::use_iterator UI = Op.getNode()->use_begin(),
-             UE = Op.getNode()->use_end(); UI != UE; ++UI) {
-        // The only case where we'd want to promote LOAD (rather then it being
-        // promoted as an operand is when it's only use is liveout.
-        if (UI->getOpcode() != ISD::CopyToReg)
-          return false;
-      }
-    }
-    Promote = true;
-    break;
-  }
   case ISD::SIGN_EXTEND:
   case ISD::ZERO_EXTEND:
   case ISD::ANY_EXTEND:
Index: test/CodeGen/X86/half.ll
===================================================================
--- test/CodeGen/X86/half.ll
+++ test/CodeGen/X86/half.ll
@@ -19,7 +19,8 @@
 
 define i16 @test_bitcast_from_half(half* %addr) {
 ; CHECK-LABEL: test_bitcast_from_half:
-; CHECK: movzwl (%rdi), %eax
+; BWON:  movzwl (%rdi), %eax
+; BWOFF: movw (%rdi), %ax
   %val = load half, half* %addr
   %val_int = bitcast half %val to i16
   ret i16 %val_int


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