[lld] r267705 - Reduce usage of isRelRelative.
Rafael Espindola via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 27 05:47:30 PDT 2016
Author: rafael
Date: Wed Apr 27 07:47:30 2016
New Revision: 267705
URL: http://llvm.org/viewvc/llvm-project?rev=267705&view=rev
Log:
Reduce usage of isRelRelative.
It is now used only for relocations that only set the low bits inside a
page. Everything else is handled by getRelExpr.
I will send a another review renaming and better documenting
isRelRelative.
Modified:
lld/trunk/ELF/Target.cpp
lld/trunk/ELF/Writer.cpp
Modified: lld/trunk/ELF/Target.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Target.cpp?rev=267705&r1=267704&r2=267705&view=diff
==============================================================================
--- lld/trunk/ELF/Target.cpp (original)
+++ lld/trunk/ELF/Target.cpp Wed Apr 27 07:47:30 2016
@@ -91,7 +91,6 @@ public:
void writePltZero(uint8_t *Buf) const override;
void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
int32_t Index, unsigned RelOff) const override;
- bool isRelRelative(uint32_t Type) const override;
void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
void relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
@@ -115,7 +114,6 @@ public:
void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
int32_t Index, unsigned RelOff) const override;
void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
- bool isRelRelative(uint32_t Type) const override;
void relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
void relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
@@ -127,7 +125,6 @@ class PPCTargetInfo final : public Targe
public:
PPCTargetInfo();
void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
- bool isRelRelative(uint32_t Type) const override;
RelExpr getRelExpr(uint32_t Type, const SymbolBody &S) const override;
};
@@ -138,7 +135,6 @@ public:
void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
int32_t Index, unsigned RelOff) const override;
void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
- bool isRelRelative(uint32_t Type) const override;
};
class AArch64TargetInfo final : public TargetInfo {
@@ -225,7 +221,7 @@ uint64_t TargetInfo::getImplicitAddend(c
uint64_t TargetInfo::getVAStart() const { return Config->Pic ? 0 : VAStart; }
bool TargetInfo::isHintRel(uint32_t Type) const { return false; }
-bool TargetInfo::isRelRelative(uint32_t Type) const { return true; }
+bool TargetInfo::isRelRelative(uint32_t Type) const { return false; }
bool TargetInfo::needsThunk(uint32_t Type, const InputFile &File,
const SymbolBody &S) const {
@@ -303,17 +299,6 @@ RelExpr X86TargetInfo::getRelExpr(uint32
}
}
-bool X86TargetInfo::isRelRelative(uint32_t Type) const {
- switch (Type) {
- default:
- return false;
- case R_386_PC32:
- case R_386_PLT32:
- case R_386_TLS_LDO_32:
- return true;
- }
-}
-
void X86TargetInfo::writeGotPltHeader(uint8_t *Buf) const {
write32le(Buf, Out<ELF32LE>::Dynamic->getVA());
}
@@ -617,23 +602,6 @@ bool X86_64TargetInfo::isTlsLocalDynamic
Type == R_X86_64_TLSLD;
}
-bool X86_64TargetInfo::isRelRelative(uint32_t Type) const {
- switch (Type) {
- default:
- return false;
- case R_X86_64_DTPOFF32:
- case R_X86_64_DTPOFF64:
- case R_X86_64_GOTTPOFF:
- case R_X86_64_PC8:
- case R_X86_64_PC16:
- case R_X86_64_PC32:
- case R_X86_64_PC64:
- case R_X86_64_PLT32:
- case R_X86_64_TPOFF32:
- return true;
- }
-}
-
void X86_64TargetInfo::relaxTlsGdToLe(uint8_t *Loc, uint32_t Type,
uint64_t Val) const {
// Convert
@@ -782,7 +750,6 @@ static uint16_t applyPPCHighest(uint64_t
static uint16_t applyPPCHighesta(uint64_t V) { return (V + 0x8000) >> 48; }
PPCTargetInfo::PPCTargetInfo() {}
-bool PPCTargetInfo::isRelRelative(uint32_t Type) const { return false; }
void PPCTargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
uint64_t Val) const {
@@ -877,16 +844,6 @@ void PPC64TargetInfo::writePlt(uint8_t *
write32be(Buf + 28, 0x4e800420); // bctr
}
-bool PPC64TargetInfo::isRelRelative(uint32_t Type) const {
- switch (Type) {
- default:
- return true;
- case R_PPC64_ADDR64:
- case R_PPC64_TOC:
- return false;
- }
-}
-
void PPC64TargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
uint64_t Val) const {
uint64_t TO = PPC64TocOffset;
@@ -1026,24 +983,11 @@ bool AArch64TargetInfo::isRelRelative(ui
default:
return false;
case R_AARCH64_ADD_ABS_LO12_NC:
- case R_AARCH64_ADR_GOT_PAGE:
- case R_AARCH64_ADR_PREL_LO21:
- case R_AARCH64_ADR_PREL_PG_HI21:
- case R_AARCH64_CALL26:
- case R_AARCH64_CONDBR19:
- case R_AARCH64_JUMP26:
case R_AARCH64_LDST8_ABS_LO12_NC:
case R_AARCH64_LDST16_ABS_LO12_NC:
case R_AARCH64_LDST32_ABS_LO12_NC:
case R_AARCH64_LDST64_ABS_LO12_NC:
case R_AARCH64_LDST128_ABS_LO12_NC:
- case R_AARCH64_PREL32:
- case R_AARCH64_PREL64:
- case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
- case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
- case R_AARCH64_TLSLE_ADD_TPREL_HI12:
- case R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
- case R_AARCH64_TSTBR14:
case R_AARCH64_LD64_GOT_LO12_NC:
return true;
}
@@ -1593,15 +1537,7 @@ bool MipsTargetInfo<ELFT>::isHintRel(uin
template <class ELFT>
bool MipsTargetInfo<ELFT>::isRelRelative(uint32_t Type) const {
- switch (Type) {
- default:
- return true;
- case R_MIPS_26:
- case R_MIPS_32:
- case R_MIPS_64:
- case R_MIPS_HI16:
- return false;
- }
+ return Type == R_MIPS_LO16;
}
}
}
Modified: lld/trunk/ELF/Writer.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Writer.cpp?rev=267705&r1=267704&r2=267705&view=diff
==============================================================================
--- lld/trunk/ELF/Writer.cpp (original)
+++ lld/trunk/ELF/Writer.cpp Wed Apr 27 07:47:30 2016
@@ -493,6 +493,24 @@ static bool needsCopyRel(RelExpr E, cons
return true;
}
+template <class ELFT>
+static bool isRelRelative(RelExpr E, uint32_t Type, const SymbolBody &Body) {
+ if (E == R_SIZE)
+ return true;
+
+ bool AbsVal = (isAbsolute<ELFT>(Body) || Body.isTls()) &&
+ !refersToGotEntry(E) && !needsPlt(E);
+
+ bool RelE = E == R_PC || E == R_PLT_PC || E == R_GOT_PC || E == R_GOTREL ||
+ E == R_PAGE_PC;
+ if (AbsVal && !RelE)
+ return true;
+ if (!AbsVal && RelE)
+ return true;
+
+ return Target->isRelRelative(Type);
+}
+
// The reason we have to do this early scan is as follows
// * To mmap the output file, we need to know the size
// * For that, we need to know how many dynamic relocs we will have.
@@ -562,7 +580,8 @@ void Writer<ELFT>::scanRelocs(InputSecti
continue;
}
- if (Expr == R_GOT && !Target->isRelRelative(Type) && Config->Shared)
+ if (Expr == R_GOT && !isRelRelative<ELFT>(Expr, Type, Body) &&
+ Config->Shared)
AddDyn({Target->RelativeRel, C.OutSec, Offset, true, &Body,
getAddend<ELFT>(RI)});
@@ -698,8 +717,7 @@ void Writer<ELFT>::scanRelocs(InputSecti
// We can however do better than just copying the incoming relocation. We
// can process some of it and and just ask the dynamic linker to add the
// load address.
- if (!Config->Pic || Target->isRelRelative(Type) || Expr == R_PC ||
- Expr == R_SIZE || isAbsolute<ELFT>(Body)) {
+ if (!Config->Pic || isRelRelative<ELFT>(Expr, Type, Body)) {
if (Config->EMachine == EM_MIPS && Body.isLocal() &&
(Type == R_MIPS_GPREL16 || Type == R_MIPS_GPREL32))
Addend += File.getMipsGp0();
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