[PATCH] D17989: [mips][microMIPS] Add CodeGen support for SLL16, SRL16, SLL, SLLV, SRA, SRAV, SRL and SRLV instructions

[Zlatko Buljan via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL267693: [mips][microMIPS] Add CodeGen support for SLL16, SRL16, SLL, SLLV, SRA, SRAV… (authored by zbuljan).

Changed prior to commit:
  http://reviews.llvm.org/D17989?vs=54166&id=55184#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D17989

Files:
  llvm/trunk/lib/Target/Mips/MicroMips32r6InstrInfo.td
  llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td
  llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
  llvm/trunk/test/CodeGen/Mips/llvm-ir/ashr.ll
  llvm/trunk/test/CodeGen/Mips/llvm-ir/lshr.ll
  llvm/trunk/test/CodeGen/Mips/llvm-ir/shl.ll
  llvm/trunk/test/CodeGen/Mips/micromips-shift.ll
  llvm/trunk/test/MC/Disassembler/Mips/micromips32r6/valid.txt
  llvm/trunk/test/MC/Disassembler/Mips/micromips64r6/valid.txt
  llvm/trunk/test/MC/Mips/micromips-shift-instructions.s
  llvm/trunk/test/MC/Mips/micromips/invalid.s
  llvm/trunk/test/MC/Mips/micromips32r6/invalid.s
  llvm/trunk/test/MC/Mips/micromips32r6/valid.s
  llvm/trunk/test/MC/Mips/micromips64r6/invalid.s
  llvm/trunk/test/MC/Mips/micromips64r6/valid.s

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