[PATCH] D18996: [PPC] Enable shuffling of VSX vectors
Guozhi Wei via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 26 15:28:55 PDT 2016
Carrot updated this revision to Diff 55109.
Carrot marked an inline comment as done.
http://reviews.llvm.org/D18996
Files:
lib/Target/PowerPC/PPCISelLowering.cpp
test/CodeGen/PowerPC/pr27078.ll
Index: test/CodeGen/PowerPC/pr27078.ll
===================================================================
--- test/CodeGen/PowerPC/pr27078.ll
+++ test/CodeGen/PowerPC/pr27078.ll
@@ -0,0 +1,15 @@
+; RUN: llc -mtriple=powerpc64-linux-gnu -mcpu=pwr8 -mattr=+vsx < %s | FileCheck %s
+
+define <4 x float> @bar(float* %p, float* %q) {
+ %1 = bitcast float* %p to <12 x float>*
+ %2 = bitcast float* %q to <12 x float>*
+ %3 = load <12 x float>, <12 x float>* %1, align 16
+ %4 = load <12 x float>, <12 x float>* %2, align 16
+ %5 = fsub <12 x float> %4, %3
+ %6 = shufflevector <12 x float> %5, <12 x float> undef, <4 x i32> <i32 0, i32 3, i32 6, i32 9>
+ ret <4 x float> %6
+
+; CHECK: vspltw
+; CHECK: vmrghw
+; CHECK: vsldoi
+}
Index: lib/Target/PowerPC/PPCISelLowering.cpp
===================================================================
--- lib/Target/PowerPC/PPCISelLowering.cpp
+++ lib/Target/PowerPC/PPCISelLowering.cpp
@@ -11920,10 +11920,8 @@
if (VT == MVT::v2i64)
return Subtarget.hasDirectMove(); // Don't need stack ops with direct moves
- if (Subtarget.hasQPX()) {
- if (VT == MVT::v4f32 || VT == MVT::v4f64 || VT == MVT::v4i1)
- return true;
- }
+ if (Subtarget.hasVSX() || Subtarget.hasQPX())
+ return true;
return TargetLowering::shouldExpandBuildVectorWithShuffles(VT, DefinedValues);
}
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D18996.55109.patch
Type: text/x-patch
Size: 1342 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20160426/63e07481/attachment.bin>
More information about the llvm-commits
mailing list