Author: kzhuravl
Date: Tue Apr 26 12:24:40 2016
New Revision: 267573
URL: http://llvm.org/viewvc/llvm-project?rev=267573&view=rev
Log:
[AMDGPU] Move reserved vgpr count for trap handler usage to SIMachineFunctionInfo + minor commenting changes
Differential Revision: http://reviews.llvm.org/D19537
Modified:
llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h
llvm/trunk/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
llvm/trunk/lib/Target/AMDGPU/SIMachineFunctionInfo.h
llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.cpp
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp?rev=267573&r1=267572&r2=267573&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp Tue Apr 26 12:24:40 2016
@@ -478,11 +478,11 @@ void AMDGPUAsmPrinter::getSIProgramInfo(
MaxSGPR += ExtraSGPRs;
// Update necessary Reserved* fields and max VGPRs used if
- // "amdgpu-debugger-reserved-trap-regs" was specified.
+ // "amdgpu-debugger-reserve-trap-regs" attribute was specified.
if (STM.debuggerReserveTrapVGPRs()) {
ProgInfo.ReservedVGPRFirst = MaxVGPR + 1;
- ProgInfo.ReservedVGPRCount = STM.debuggerReserveTrapVGPRCount();
- MaxVGPR += STM.debuggerReserveTrapVGPRCount();
+ ProgInfo.ReservedVGPRCount = MFI->getDebuggerReserveTrapVGPRCount();
+ MaxVGPR += MFI->getDebuggerReserveTrapVGPRCount();
}
// We found the maximum register index. They start at 0, so add one to get the
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.h?rev=267573&r1=267572&r2=267573&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.h (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.h Tue Apr 26 12:24:40 2016
@@ -69,7 +69,10 @@ private:
uint32_t LDSSize;
bool FlatUsed;
+ // If ReservedVGPRCount is 0 then must be 0. Otherwise, this is the first
+ // fixed VGPR number reserved.
uint16_t ReservedVGPRFirst;
+ // The number of consecutive VGPRs reserved.
uint16_t ReservedVGPRCount;
// Bonus information for debugging.
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h?rev=267573&r1=267572&r2=267573&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h Tue Apr 26 12:24:40 2016
@@ -314,10 +314,6 @@ public:
return DebuggerReserveTrapVGPRs;
}
- unsigned debuggerReserveTrapVGPRCount() const {
- return debuggerReserveTrapVGPRs() ? 4 : 0;
- }
-
bool dumpCode() const {
return DumpCode;
}
Modified: llvm/trunk/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp?rev=267573&r1=267572&r2=267573&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp Tue Apr 26 12:24:40 2016
@@ -49,6 +49,7 @@ SIMachineFunctionInfo::SIMachineFunction
PSInputAddr(0),
ReturnsVoid(true),
MaximumWorkGroupSize(0),
+ DebuggerReserveTrapVGPRCount(0),
LDSWaveSpillSize(0),
PSInputEna(0),
NumUserSGPRs(0),
@@ -132,6 +133,9 @@ SIMachineFunctionInfo::SIMachineFunction
MaximumWorkGroupSize = AMDGPU::getMaximumWorkGroupSize(*F);
else
MaximumWorkGroupSize = ST.getWavefrontSize();
+
+ if (ST.debuggerReserveTrapVGPRs())
+ DebuggerReserveTrapVGPRCount = 4;
}
unsigned SIMachineFunctionInfo::addPrivateSegmentBuffer(
Modified: llvm/trunk/lib/Target/AMDGPU/SIMachineFunctionInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIMachineFunctionInfo.h?rev=267573&r1=267572&r2=267573&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIMachineFunctionInfo.h (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIMachineFunctionInfo.h Tue Apr 26 12:24:40 2016
@@ -62,6 +62,9 @@ class SIMachineFunctionInfo final : publ
unsigned MaximumWorkGroupSize;
+ // Number of reserved VGPRs for trap handler usage.
+ unsigned DebuggerReserveTrapVGPRCount;
+
public:
// FIXME: Make private
unsigned LDSWaveSpillSize;
@@ -326,6 +329,10 @@ public:
ReturnsVoid = Value;
}
+ unsigned getDebuggerReserveTrapVGPRCount() const {
+ return DebuggerReserveTrapVGPRCount;
+ }
+
unsigned getMaximumWorkGroupSize(const MachineFunction &MF) const;
};
Modified: llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.cpp?rev=267573&r1=267572&r2=267573&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.cpp Tue Apr 26 12:24:40 2016
@@ -197,8 +197,9 @@ BitVector SIRegisterInfo::getReservedReg
// attribute was specified.
const AMDGPUSubtarget &ST = MF.getSubtarget<AMDGPUSubtarget>();
if (ST.debuggerReserveTrapVGPRs()) {
- for (unsigned i = MaxWorkGroupVGPRCount - ST.debuggerReserveTrapVGPRCount();
- i < MaxWorkGroupVGPRCount; ++i) {
+ unsigned ReservedVGPRFirst =
+ MaxWorkGroupVGPRCount - MFI->getDebuggerReserveTrapVGPRCount();
+ for (unsigned i = ReservedVGPRFirst; i < MaxWorkGroupVGPRCount; ++i) {
unsigned Reg = AMDGPU::VGPR_32RegClass.getRegister(i);
reserveRegisterTuples(Reserved, Reg);
}