[PATCH] D18034: [Power PC] fix register alignment for long double type (soft float)

[Hal Finkel via llvm-commits]

hfinkel accepted this revision.
hfinkel added a comment.
This revision is now accepted and ready to land.

A few minor comments. Otherwise, LGTM.


================
Comment at: lib/Target/PowerPC/PPCCCState.cpp:19
@@ +18,3 @@
+    const SmallVectorImpl<ISD::OutputArg> &Outs) {
+  for (unsigned i = 0; i < Outs.size(); ++i) {
+    if (Outs[i].ArgVT == llvm::MVT::ppcf128)
----------------
Use a range-based for loop.

================
Comment at: lib/Target/PowerPC/PPCCCState.cpp:29
@@ +28,3 @@
+    const SmallVectorImpl<ISD::InputArg> &Ins) {
+  for (unsigned i = 0; i < Ins.size(); ++i) {
+    if (Ins[i].ArgVT == llvm::MVT::ppcf128) {
----------------
Use a range-based for loop.

================
Comment at: lib/Target/PowerPC/PPCISelLowering.cpp:4584
@@ -4577,3 +4583,3 @@
   }
-
+  CCInfo.clearWasPPCF128();
   // Assign locations to all of the outgoing aggregate by value arguments.
----------------
Please retain the existing blank line, either before or after this call.


Repository:
  rL LLVM

http://reviews.llvm.org/D18034