[PATCH] D19487: [LV] Reallow interleaved load groups with gaps

[silviu.baranga@arm.com via llvm-commits]

sbaranga added a comment.

I might be missing something obvious, but why is TC >= Step if TC % Step is 0?

I think we also need to check that TC is not 0.


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Comment at: lib/Transforms/Vectorize/LoopVectorize.cpp:2896
@@ +2895,3 @@
+  // step does not evenly divide the trip count, no adjustment is necessary
+  // since there will already be remainder iterations.
+  if (VF > 1 && Legal->requiresScalarIteration()) {
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You're right, that should have been *not* 0, thanks!

The comment above needs to be updated.


http://reviews.llvm.org/D19487