[llvm] r267360 - Tweak comments to make it clear that these combines are for SSE scalar instructions.

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Sun Apr 24 12:31:57 PDT 2016


Author: rksimon
Date: Sun Apr 24 14:31:56 2016
New Revision: 267360

URL: http://llvm.org/viewvc/llvm-project?rev=267360&view=rev
Log:
Tweak comments to make it clear that these combines are for SSE scalar instructions.

Modified:
    llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp

Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp?rev=267360&r1=267359&r2=267360&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp Sun Apr 24 14:31:56 2016
@@ -1179,7 +1179,7 @@ Value *InstCombiner::SimplifyDemandedVec
     switch (II->getIntrinsicID()) {
     default: break;
 
-    // Unary vector operations that work column-wise.
+    // Unary scalar-as-vector operations that work column-wise.
     case Intrinsic::x86_sse_rcp_ss:
     case Intrinsic::x86_sse_rsqrt_ss:
     case Intrinsic::x86_sse_sqrt_ss:
@@ -1193,11 +1193,12 @@ Value *InstCombiner::SimplifyDemandedVec
       // If lowest element of a scalar op isn't used then use Arg0.
       if (DemandedElts.getLoBits(1) != 1)
         return II->getArgOperand(0);
-      // TODO: If only low elt lower SQRT to FSQRT (with rounding/exceptions checks).
+      // TODO: If only low elt lower SQRT to FSQRT (with rounding/exceptions
+      // checks).
       break;
 
-    // Binary vector operations that work column-wise.  A dest element is a
-    // function of the corresponding input elements from the two inputs.
+    // Binary scalar-as-vector operations that work column-wise.  A dest element
+    // is a function of the corresponding input elements from the two inputs.
     case Intrinsic::x86_sse_add_ss:
     case Intrinsic::x86_sse_sub_ss:
     case Intrinsic::x86_sse_mul_ss:




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