[PATCH] D18601: AMDGPU/SI: Optimize adjacent s_nop instructions
Tom Stellard via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 22 11:07:44 PDT 2016
tstellarAMD updated this revision to Diff 54679.
tstellarAMD added a comment.
Fix possible undefined behavior.
http://reviews.llvm.org/D18601
Files:
lib/Target/AMDGPU/SIShrinkInstructions.cpp
Index: lib/Target/AMDGPU/SIShrinkInstructions.cpp
===================================================================
--- lib/Target/AMDGPU/SIShrinkInstructions.cpp
+++ lib/Target/AMDGPU/SIShrinkInstructions.cpp
@@ -241,6 +241,32 @@
}
}
}
+ // Combine adjacent s_nops to use the immediate operand encoding how long
+ // to wait.
+ //
+ // s_nop N
+ // s_nop M
+ // =>
+ // s_nop (N + M)
+ if (MI.getOpcode() == AMDGPU::S_NOP &&
+ Next != MBB.end() &&
+ (*Next).getOpcode() == AMDGPU::S_NOP) {
+
+ MachineInstr &NextMI = *Next;
+ // The instruction encodes the amount to wait with an offset of 1,
+ // i.e. 0 is wait 1 cycle. Convert both to cycles and then convert back
+ // after adding.
+ uint8_t Nop0 = MI.getOperand(0).getImm() + 1;
+ uint8_t Nop1 = NextMI.getOperand(0).getImm() + 1;
+
+ // Make sure we don't overflow the bounds.
+ if (Nop0 + Nop1 <= 8) {
+ NextMI.getOperand(0).setImm(Nop0 + Nop1 - 1);
+ MI.eraseFromParent();
+ }
+
+ continue;
+ }
// FIXME: We also need to consider movs of constant operands since
// immediate operands are not folded if they have more than one use, and
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