[llvm] r266988 - [mips][microMIPS] Add R_MICROMIPS_PC19_S2 relocation
Zoran Jovanovic via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 21 07:09:36 PDT 2016
Author: zjovanovic
Date: Thu Apr 21 09:09:35 2016
New Revision: 266988
URL: http://llvm.org/viewvc/llvm-project?rev=266988&view=rev
Log:
[mips][microMIPS] Add R_MICROMIPS_PC19_S2 relocation
Differential Revision: http://reviews.llvm.org/D14915
Modified:
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
llvm/trunk/test/MC/Mips/micromips32r6/relocations.s
llvm/trunk/test/MC/Mips/micromips64r6/relocations.s
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp?rev=266988&r1=266987&r2=266988&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp Thu Apr 21 09:09:35 2016
@@ -69,6 +69,7 @@ static unsigned adjustFixupValue(const M
}
break;
case Mips::fixup_MIPS_PC19_S2:
+ case Mips::fixup_MICROMIPS_PC19_S2:
// Forcing a signed division because Value can be negative.
Value = (int64_t)Value / 4;
// We now check if Value can be encoded as a 19-bit signed immediate.
@@ -322,6 +323,7 @@ getFixupKindInfo(MCFixupKind Kind) const
{ "fixup_MICROMIPS_PC10_S1", 0, 10, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_MICROMIPS_PC16_S1", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_MICROMIPS_PC26_S1", 0, 26, MCFixupKindInfo::FKF_IsPCRel },
+ { "fixup_MICROMIPS_PC19_S2", 0, 19, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_MICROMIPS_CALL16", 0, 16, 0 },
{ "fixup_MICROMIPS_GOT_DISP", 0, 16, 0 },
{ "fixup_MICROMIPS_GOT_PAGE", 0, 16, 0 },
@@ -389,6 +391,7 @@ getFixupKindInfo(MCFixupKind Kind) const
{ "fixup_MICROMIPS_PC10_S1", 6, 10, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_MICROMIPS_PC16_S1",16, 16, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_MICROMIPS_PC26_S1", 6, 26, MCFixupKindInfo::FKF_IsPCRel },
+ { "fixup_MICROMIPS_PC19_S2",13, 19, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_MICROMIPS_CALL16", 16, 16, 0 },
{ "fixup_MICROMIPS_GOT_DISP", 16, 16, 0 },
{ "fixup_MICROMIPS_GOT_PAGE", 16, 16, 0 },
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp?rev=266988&r1=266987&r2=266988&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp Thu Apr 21 09:09:35 2016
@@ -91,6 +91,8 @@ unsigned MipsELFObjectWriter::getRelocTy
return ELF::R_MICROMIPS_PC16_S1;
case Mips::fixup_MICROMIPS_PC26_S1:
return ELF::R_MICROMIPS_PC26_S1;
+ case Mips::fixup_MICROMIPS_PC19_S2:
+ return ELF::R_MICROMIPS_PC19_S2;
case Mips::fixup_MIPS_PC19_S2:
return ELF::R_MIPS_PC19_S2;
case Mips::fixup_MIPS_PC18_S3:
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h?rev=266988&r1=266987&r2=266988&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h Thu Apr 21 09:09:35 2016
@@ -173,6 +173,9 @@ namespace Mips {
// resulting in - R_MICROMIPS_PC26_S1
fixup_MICROMIPS_PC26_S1,
+ // resulting in - R_MICROMIPS_PC19_S2
+ fixup_MICROMIPS_PC19_S2,
+
// resulting in - R_MICROMIPS_CALL16
fixup_MICROMIPS_CALL16,
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp?rev=266988&r1=266987&r2=266988&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp Thu Apr 21 09:09:35 2016
@@ -877,8 +877,9 @@ MipsMCCodeEmitter::getSimm19Lsl2Encoding
"getSimm19Lsl2Encoding expects only expressions or an immediate");
const MCExpr *Expr = MO.getExpr();
- Fixups.push_back(MCFixup::create(0, Expr,
- MCFixupKind(Mips::fixup_MIPS_PC19_S2)));
+ Mips::Fixups FixupKind = isMicroMips(STI) ? Mips::fixup_MICROMIPS_PC19_S2
+ : Mips::fixup_MIPS_PC19_S2;
+ Fixups.push_back(MCFixup::create(0, Expr, MCFixupKind(FixupKind)));
return 0;
}
Modified: llvm/trunk/test/MC/Mips/micromips32r6/relocations.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/micromips32r6/relocations.s?rev=266988&r1=266987&r2=266988&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/micromips32r6/relocations.s (original)
+++ llvm/trunk/test/MC/Mips/micromips32r6/relocations.s Thu Apr 21 09:09:35 2016
@@ -11,6 +11,12 @@
# CHECK-FIXUP: bc bar # encoding: [0b100101AA,A,A,A]
# CHECK-FIXUP: # fixup A - offset: 0,
# CHECK-FIXUP: value: bar-4, kind: fixup_MICROMIPS_PC26_S1
+# CHECK-FIXUP: addiupc $2, bar # encoding: [0x78,0b01000AAA,A,A]
+# CHECK-FIXUP: # fixup A - offset: 0,
+# CHECK-FIXUP: value: bar, kind: fixup_MICROMIPS_PC19_S2
+# CHECK-FIXUP: lwpc $2, bar # encoding: [0x78,0b01001AAA,A,A]
+# CHECK-FIXUP: # fixup A - offset: 0,
+# CHECK-FIXUP: value: bar, kind: fixup_MICROMIPS_PC19_S2
#------------------------------------------------------------------------------
# Check that the appropriate relocations were created.
#------------------------------------------------------------------------------
@@ -21,4 +27,5 @@
balc bar
bc bar
-
+ addiupc $2,bar
+ lwpc $2,bar
Modified: llvm/trunk/test/MC/Mips/micromips64r6/relocations.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/micromips64r6/relocations.s?rev=266988&r1=266987&r2=266988&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/micromips64r6/relocations.s (original)
+++ llvm/trunk/test/MC/Mips/micromips64r6/relocations.s Thu Apr 21 09:09:35 2016
@@ -11,6 +11,12 @@
# CHECK-FIXUP: bc bar # encoding: [0b100101AA,A,A,A]
# CHECK-FIXUP: # fixup A - offset: 0,
# CHECK-FIXUP: value: bar-4, kind: fixup_MICROMIPS_PC26_S1
+# CHECK-FIXUP: addiupc $2, bar # encoding: [0x78,0b01000AAA,A,A]
+# CHECK-FIXUP: # fixup A - offset: 0,
+# CHECK-FIXUP: value: bar, kind: fixup_MICROMIPS_PC19_S2
+# CHECK-FIXUP: lwpc $2, bar # encoding: [0x78,0b01001AAA,A,A]
+# CHECK-FIXUP: # fixup A - offset: 0,
+# CHECK-FIXUP: value: bar, kind: fixup_MICROMIPS_PC19_S2
#------------------------------------------------------------------------------
# Check that the appropriate relocations were created.
#------------------------------------------------------------------------------
@@ -21,3 +27,5 @@
balc bar
bc bar
+ addiupc $2,bar
+ lwpc $2,bar
More information about the llvm-commits
mailing list