[PATCH] D19318: [InstCombine][SSE] Demanded vector elements for scalar intrinsics (Part 2)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 20 05:23:41 PDT 2016
RKSimon added inline comments.
================
Comment at: lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp:1236
@@ -1209,1 +1235,3 @@
+ // TODO: Lower MIN/MAX/etc.
+ // TODO: Lower DIV (with rounding/exceptions checks).
Value *LHS = II->getArgOperand(0);
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I'm trying to work out if we need to be worried about rounding/exceptions checks for DIVSS/DIVSD - we have no equivalent packed intrinsics they always use FDIV.
Repository:
rL LLVM
http://reviews.llvm.org/D19318
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