[PATCH] D19304: [PowerPC] Add support for llvm.thread.pointer intrinsic
Marcin KoĆcielnicki via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 19 17:28:59 PDT 2016
koriakin created this revision.
koriakin added reviewers: hfinkel, kbarton.
koriakin added a subscriber: llvm-commits.
koriakin set the repository for this revision to rL LLVM.
Repository:
rL LLVM
http://reviews.llvm.org/D19304
Files:
lib/Target/PowerPC/PPCISelLowering.cpp
test/CodeGen/PowerPC/thread-pointer.ll
Index: test/CodeGen/PowerPC/thread-pointer.ll
===================================================================
--- /dev/null
+++ test/CodeGen/PowerPC/thread-pointer.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s --check-prefix=CHECK-64
+
+; Function Attrs: nounwind readnone
+declare i8* @llvm.thread.pointer() #1
+
+define i8* @thread_pointer() {
+; CHECK-32-LABEL: @thread_pointer
+; CHECK-32: mr 3, 2
+; CHECK-32: blr
+; CHECK-64-LABEL: @thread_pointer
+; CHECK-64: mr 3, 13
+; CHECK-64: blr
+ %1 = tail call i8* @llvm.thread.pointer()
+ ret i8* %1
+}
Index: lib/Target/PowerPC/PPCISelLowering.cpp
===================================================================
--- lib/Target/PowerPC/PPCISelLowering.cpp
+++ lib/Target/PowerPC/PPCISelLowering.cpp
@@ -7715,6 +7715,15 @@
/// lower, do it, otherwise return null.
SDValue PPCTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
SelectionDAG &DAG) const {
+ unsigned IntrinsicID =
+ cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
+
+ if (IntrinsicID == Intrinsic::thread_pointer) {
+ bool is64bit = Subtarget.isPPC64();
+ return DAG.getRegister(is64bit ? PPC::X13 : PPC::R2,
+ is64bit ? MVT::i64 : MVT::i32);
+ }
+
// If this is a lowered altivec predicate compare, CompareOpc is set to the
// opcode number of the comparison.
SDLoc dl(Op);
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