[PATCH] D19255: [ppc64] fix bug in prologue that mfocrf's cr operand should be explict state instead of implicit
Chuang-Yu Cheng via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 18 22:05:52 PDT 2016
cycheng created this revision.
cycheng added reviewers: kbarton, tjablin.
cycheng added subscribers: hfinkel, nemanjai, llvm-commits.
This patch resolves https://llvm.org/bugs/show_bug.cgi?id=27414
http://reviews.llvm.org/D19255
Files:
lib/Target/PowerPC/PPCFrameLowering.cpp
Index: lib/Target/PowerPC/PPCFrameLowering.cpp
===================================================================
--- lib/Target/PowerPC/PPCFrameLowering.cpp
+++ lib/Target/PowerPC/PPCFrameLowering.cpp
@@ -843,12 +843,15 @@
// mfocrf to selectively save just those fields, because mfocrf has short
// latency compares to mfcr.
unsigned MfcrOpcode = PPC::MFCR8;
- if (isELFv2ABI && MustSaveCRs.size() == 1)
+ unsigned CrState = RegState::ImplicitKill;
+ if (isELFv2ABI && MustSaveCRs.size() == 1) {
MfcrOpcode = PPC::MFOCRF8;
+ CrState = RegState::Kill;
+ }
MachineInstrBuilder MIB =
BuildMI(MBB, MBBI, dl, TII.get(MfcrOpcode), TempReg);
for (unsigned i = 0, e = MustSaveCRs.size(); i != e; ++i)
- MIB.addReg(MustSaveCRs[i], RegState::ImplicitKill);
+ MIB.addReg(MustSaveCRs[i], CrState);
BuildMI(MBB, MBBI, dl, TII.get(PPC::STW8))
.addReg(TempReg, getKillRegState(true))
.addImm(8)
@@ -865,12 +868,15 @@
// mfocrf to selectively save just those fields, because mfocrf has short
// latency compares to mfcr.
unsigned MfcrOpcode = PPC::MFCR8;
- if (isELFv2ABI && MustSaveCRs.size() == 1)
+ unsigned CrState = RegState::ImplicitKill;
+ if (isELFv2ABI && MustSaveCRs.size() == 1) {
MfcrOpcode = PPC::MFOCRF8;
+ CrState = RegState::Kill;
+ }
MachineInstrBuilder MIB =
BuildMI(MBB, MBBI, dl, TII.get(MfcrOpcode), TempReg);
for (unsigned i = 0, e = MustSaveCRs.size(); i != e; ++i)
- MIB.addReg(MustSaveCRs[i], RegState::ImplicitKill);
+ MIB.addReg(MustSaveCRs[i], CrState);
}
if (HasFP)
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