[PATCH] D19182: AArch64: Use SplitCSR for callee save registers used for parameters.

Tim Northover via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 18 14:32:01 PDT 2016


t.p.northover added a subscriber: t.p.northover.
t.p.northover accepted this revision.
t.p.northover added a reviewer: t.p.northover.
t.p.northover added a comment.
This revision is now accepted and ready to land.

Looks reasonable. I hope it's worth it.

Tim.


================
Comment at: lib/Target/AArch64/AArch64RegisterInfo.h:36
@@ -35,2 +35,3 @@
 
-  /// Code Generation virtual methods...
+  /// Return a zero teerminated list of callee saved registers for function \p
+  /// MF. This does not include callee saved registers handled by the SplitCSR
----------------
Typo on "teerminated".


Repository:
  rL LLVM

http://reviews.llvm.org/D19182





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