[PATCH] D19160: AMDGPU: Fold shift into cvt_f32_ubyteN

[Matt Arsenault via llvm-commits]

arsenm added inline comments.

================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:2678-2681
@@ +2677,6 @@
+
+    if (Src.getOpcode() == ISD::SRL) {
+      // cvt_f32_ubyte0 (shl x, 16) -> cvt_f32_ubyte2 x
+      // cvt_f32_ubyte1 (shl x, 16) -> cvt_f32_ubyte3 x
+      // cvt_f32_ubyte0 (shl x, 8) -> cvt_f32_ubyte1 x
+
----------------
tstellarAMD wrote:
> The comment doesn't match the if statement.  Which is correct?
Should should be SRLs


http://reviews.llvm.org/D19160