[PATCH] D19132: AMDGPU: Correct reported code size

Valery Pykhtin via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 14 15:40:11 PDT 2016


vpykhtin added a comment.

I'm ok with the change but I need to find out which disassembly decoding table zero sized instructions will be placed to or is there other decoding mechanism for such instructions.


http://reviews.llvm.org/D19132





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