[llvm] r266270 - TargetLowering: Factor out common code for tail call eligibility checking; NFC
Matthias Braun via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 13 18:10:43 PDT 2016
Author: matze
Date: Wed Apr 13 20:10:42 2016
New Revision: 266270
URL: http://llvm.org/viewvc/llvm-project?rev=266270&view=rev
Log:
TargetLowering: Factor out common code for tail call eligibility checking; NFC
Modified:
llvm/trunk/include/llvm/Target/TargetLowering.h
llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Modified: llvm/trunk/include/llvm/Target/TargetLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=266270&r1=266269&r2=266270&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetLowering.h (original)
+++ llvm/trunk/include/llvm/Target/TargetLowering.h Wed Apr 13 20:10:42 2016
@@ -43,6 +43,7 @@
namespace llvm {
class CallInst;
class CCState;
+ class CCValAssign;
class FastISel;
class FunctionLoweringInfo;
class ImmutableCallSite;
@@ -52,6 +53,7 @@ namespace llvm {
class MachineInstr;
class MachineJumpTableInfo;
class MachineLoop;
+ class MachineRegisterInfo;
class Mangler;
class MCContext;
class MCExpr;
@@ -2139,6 +2141,14 @@ public:
bool doesNotReturn = false,
bool isReturnValueUsed = true) const;
+ /// Check whether parameters to a call that are passed in callee saved
+ /// registers are the same as from the calling function. This needs to be
+ /// checked for tail call eligibility.
+ bool parametersInCSRMatch(const MachineRegisterInfo &MRI,
+ const uint32_t *CallerPreservedMask,
+ const SmallVectorImpl<CCValAssign> &ArgLocs,
+ const SmallVectorImpl<SDValue> &OutVals) const;
+
//===--------------------------------------------------------------------===//
// TargetLowering Optimization Methods
//
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=266270&r1=266269&r2=266270&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Wed Apr 13 20:10:42 2016
@@ -15,9 +15,11 @@
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/CodeGen/Analysis.h"
+#include "llvm/CodeGen/CallingConvLower.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/DerivedTypes.h"
@@ -65,6 +67,31 @@ bool TargetLowering::isInTailCallPositio
return isUsedByReturnOnly(Node, Chain);
}
+bool TargetLowering::parametersInCSRMatch(const MachineRegisterInfo &MRI,
+ const uint32_t *CallerPreservedMask,
+ const SmallVectorImpl<CCValAssign> &ArgLocs,
+ const SmallVectorImpl<SDValue> &OutVals) const {
+ for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) {
+ const CCValAssign &ArgLoc = ArgLocs[I];
+ if (!ArgLoc.isRegLoc())
+ continue;
+ unsigned Reg = ArgLoc.getLocReg();
+ // Only look at callee saved registers.
+ if (MachineOperand::clobbersPhysReg(CallerPreservedMask, Reg))
+ continue;
+ // Check that we pass the value used for the caller.
+ // (We look for a CopyFromReg reading a virtual register that is used
+ // for the function live-in value of register Reg)
+ SDValue Value = OutVals[I];
+ if (Value->getOpcode() != ISD::CopyFromReg)
+ return false;
+ unsigned ArgReg = cast<RegisterSDNode>(Value->getOperand(1))->getReg();
+ if (MRI.getLiveInPhysReg(ArgReg) != Reg)
+ return false;
+ }
+ return true;
+}
+
/// \brief Set CallLoweringInfo attribute flags based on a call instruction
/// and called function attributes.
void TargetLowering::ArgListEntry::setAttributes(ImmutableCallSite *CS,
Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=266270&r1=266269&r2=266270&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Wed Apr 13 20:10:42 2016
@@ -2899,27 +2899,9 @@ bool AArch64TargetLowering::isEligibleFo
if (CCInfo.getNextStackOffset() > FuncInfo->getBytesInStackArgArea())
return false;
- // Parameters passed in callee saved registers must have the same value in
- // caller and callee.
- for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) {
- const CCValAssign &ArgLoc = ArgLocs[I];
- if (!ArgLoc.isRegLoc())
- continue;
- unsigned Reg = ArgLoc.getLocReg();
- // Only look at callee saved registers.
- if (MachineOperand::clobbersPhysReg(CallerPreserved, Reg))
- continue;
- // Check that we pass the value used for the caller.
- // (We look for a CopyFromReg reading a virtual register that is used
- // for the function live-in value of register Reg)
- SDValue Value = OutVals[I];
- if (Value->getOpcode() != ISD::CopyFromReg)
- return false;
- unsigned ArgReg = cast<RegisterSDNode>(Value->getOperand(1))->getReg();
- const MachineRegisterInfo &MRI = MF.getRegInfo();
- if (MRI.getLiveInPhysReg(ArgReg) != Reg)
- return false;
- }
+ const MachineRegisterInfo &MRI = MF.getRegInfo();
+ if (!parametersInCSRMatch(MRI, CallerPreserved, ArgLocs, OutVals))
+ return false;
return true;
}
Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=266270&r1=266269&r2=266270&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Wed Apr 13 20:10:42 2016
@@ -2208,27 +2208,9 @@ ARMTargetLowering::IsEligibleForTailCall
}
}
- // Parameters passed in callee saved registers must have the same value in
- // caller and callee.
- for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) {
- const CCValAssign &ArgLoc = ArgLocs[I];
- if (!ArgLoc.isRegLoc())
- continue;
- unsigned Reg = ArgLoc.getLocReg();
- // Only look at callee saved registers.
- if (MachineOperand::clobbersPhysReg(CallerPreserved, Reg))
- continue;
- // Check that we pass the value used for the caller.
- // (We look for a CopyFromReg reading a virtual register that is used
- // for the function live-in value of register Reg)
- SDValue Value = OutVals[I];
- if (Value->getOpcode() != ISD::CopyFromReg)
- return false;
- unsigned ArgReg = cast<RegisterSDNode>(Value->getOperand(1))->getReg();
- const MachineRegisterInfo &MRI = MF.getRegInfo();
- if (MRI.getLiveInPhysReg(ArgReg) != Reg)
- return false;
- }
+ const MachineRegisterInfo &MRI = MF.getRegInfo();
+ if (!parametersInCSRMatch(MRI, CallerPreserved, ArgLocs, OutVals))
+ return false;
}
return true;
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=266270&r1=266269&r2=266270&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Apr 13 20:10:42 2016
@@ -3849,27 +3849,9 @@ bool X86TargetLowering::IsEligibleForTai
}
}
- // Parameters passed in callee saved registers must have the same value in
- // caller and callee.
- for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) {
- const CCValAssign &ArgLoc = ArgLocs[I];
- if (!ArgLoc.isRegLoc())
- continue;
- unsigned Reg = ArgLoc.getLocReg();
- // Only look at callee saved registers.
- if (MachineOperand::clobbersPhysReg(CallerPreserved, Reg))
- continue;
- // Check that we pass the value used for the caller.
- // (We look for a CopyFromReg reading a virtual register that is used
- // for the function live-in value of register Reg)
- SDValue Value = OutVals[I];
- if (Value->getOpcode() != ISD::CopyFromReg)
- return false;
- unsigned ArgReg = cast<RegisterSDNode>(Value->getOperand(1))->getReg();
- const MachineRegisterInfo &MRI = MF.getRegInfo();
- if (MRI.getLiveInPhysReg(ArgReg) != Reg)
- return false;
- }
+ const MachineRegisterInfo &MRI = MF.getRegInfo();
+ if (!parametersInCSRMatch(MRI, CallerPreserved, ArgLocs, OutVals))
+ return false;
}
bool CalleeWillPop =
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