[PATCH] D18901: ARM: Use a callee save register for the swiftself parameter.

[Matthias Braun via llvm-commits]

MatzeB marked 4 inline comments as done.
MatzeB added a comment.

Thanks for the reviews.


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Comment at: test/CodeGen/ARM/swiftself.ll:38
@@ +37,3 @@
+; OPT-NEXT: bl {{_?}}swiftself_param
+define void @swiftself_passthrough(i8* swiftself %addr0) {
+  call i8 *@swiftself_param(i8* swiftself %addr0)
----------------
qcolombet wrote:
> No checks for O0?
This checks whether we can indeed generate code without any additional movs between the calls. The O0 codegen does not optimize enough for that so there is nothing to test.

================
Comment at: test/CodeGen/ARM/swiftself.ll:48
@@ +47,3 @@
+; TAILCALL-NOT: pop
+define i8* @swiftself_tail(i8* swiftself %addr0) {
+  call void asm sideeffect "", "~{r10}"()
----------------
qcolombet wrote:
> No checks for O0 and OPT alone?
This checks that tail call optimization does indeed happen when the params are the same, O0 codegen does not perform tailcall opts, "armv7-apple-ios" also has tailcalls disabled so I introduced a new TAILCALL prefix for all target where it does happen.


Repository:
  rL LLVM

http://reviews.llvm.org/D18901