[PATCH] D18893: [mips] Sign-extend i32 values truncated from previously zero-extended i32 values.

[Daniel Sanders via llvm-commits]

dsanders accepted this revision.
dsanders added a comment.
This revision is now accepted and ready to land.

LGTM with a change to the new comment.


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Comment at: lib/Target/Mips/Mips64InstrInfo.td:516
@@ -511,2 +515,3 @@
               (EXTRACT_SUBREG GPR64:$src, sub_32)>;
-def : MipsPat<(trunc (assertzext GPR64:$src)),
+// 64-bit ISAs require properly 32-bit sign-extended values in the registers.
+// This means that we can't issue an extract_subreg for nodes such as
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We need to be explicit about what it means to be 'properly sign-extended' since the correct behaviour is likely to be counter-intuitive to most readers. If you were to ask what the register representation of the uint32_t value 0x80000000 is on a 64-bit MIPS, I doubt many people would answer 0xFFFFFFFF80000000.


http://reviews.llvm.org/D18893