[PATCH] D18917: AMDGPU/SI: Add support for spilling VGPRs without having to scavenge registers

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 12 09:07:59 PDT 2016


arsenm accepted this revision.
arsenm added a comment.
This revision is now accepted and ready to land.

Is a test possible?


================
Comment at: lib/Target/AMDGPU/SIRegisterInfo.cpp:267
@@ +266,3 @@
+      // There are no free SGPRs, and since we are in the process of spilling
+      // VGPRs too.  Since we need a VGPR in order to spill SGPRS (this is true
+      // on SI/CI and on VI it is true until we implement spilling using scalar
----------------
SGPRS->SGPRs


http://reviews.llvm.org/D18917





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