[PATCH] D17068: [mips][microMIPS] Fix for "Cannot copy registers" assertion

Vasileios Kalintiris via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 11 07:05:08 PDT 2016


vkalintiris added a comment.

Overall the changes LGTM. However, could you reply to my comments before committing?


================
Comment at: test/CodeGen/Mips/invalid_operands.ll:1-23
@@ +1,23 @@
+; RUN: llc %s -march=mips -mcpu=mips32r3 -mattr=micromips -filetype=asm \
+; RUN: -relocation-model=pic -O3 -o - | FileCheck %s
+; RUN: llc %s -march=mips -mcpu=mips64r3 -mattr=micromips -filetype=asm \
+; RUN: -relocation-model=pic -O3 -o - | FileCheck %s
+
+%struct.T = type { i32 }
+
+$_ZN1TaSERKS_ = comdat any
+
+define linkonce_odr void @_ZN1TaSERKS_(%struct.T* %this, %struct.T* dereferenceable(4) %t) #0 comdat align 2 {
+entry:
+  %this.addr = alloca %struct.T*, align 4
+  %t.addr = alloca %struct.T*, align 4
+  %this1 = load %struct.T*, %struct.T** %this.addr, align 4
+  %0 = load %struct.T*, %struct.T** %t.addr, align 4
+  %V3 = getelementptr inbounds %struct.T, %struct.T* %0, i32 0, i32 0
+  %1 = load i32, i32* %V3, align 4
+  %V4 = getelementptr inbounds %struct.T, %struct.T* %this1, i32 0, i32 0
+  store i32 %1, i32* %V4, align 4
+  ret void
+}
+
+; CHECK: lw16 ${{[0-9]+}}, 0($2)
----------------
What is the goal of this test? Currently, you are testing for `lw16` and the base register $2, but I don't see the motivation behind this. 

================
Comment at: test/CodeGen/Mips/micromips-addiu.ll:3
@@ -2,1 +2,3 @@
 ; RUN:   -relocation-model=pic -O3 < %s | FileCheck %s
+; For microMIPS64, also check 32 to 64 bit registers and 64 to 32 bit register copies
+; RUN: llc -march=mips -mcpu=mips64r6 -mattr=+micromips \
----------------
I don't think that we should add this comment to every test because it'll become confusing in the future as we add more RUN-lines. Could you pick a minimal test, or just one of the existing tests, and check this in a separate test-file?

================
Comment at: test/CodeGen/Mips/micromips-addiu.ll:4
@@ +3,3 @@
+; For microMIPS64, also check 32 to 64 bit registers and 64 to 32 bit register copies
+; RUN: llc -march=mips -mcpu=mips64r6 -mattr=+micromips \
+; RUN:   -relocation-model=pic -O3 < %s | FileCheck %s
----------------
`-march=` should be `mips64` instead of `mips`. Similarly for the test cases below.


http://reviews.llvm.org/D17068





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