[PATCH] D18962: [SystemZ] README: remove an implemented idea, add some new ones.

[Marcin Kościelnicki via llvm-commits]

koriakin created this revision.
koriakin added a reviewer: uweigand.
koriakin added a subscriber: llvm-commits.
koriakin set the repository for this revision to rL LLVM.

The note about conditional returns can now be removed, as they are
implemented.  Let's also add 3 new ones in exchange.

Repository:
  rL LLVM

http://reviews.llvm.org/D18962

Files:
  lib/Target/SystemZ/README.txt

Index: lib/Target/SystemZ/README.txt
===================================================================
--- lib/Target/SystemZ/README.txt
+++ lib/Target/SystemZ/README.txt
@@ -43,11 +43,6 @@
 
 --
 
-We might want to use BRANCH ON CONDITION for conditional indirect calls
-and conditional returns.
-
---
-
 We don't use the TEST DATA CLASS instructions.
 
 --
@@ -166,3 +161,19 @@
 
 We might want to model all access registers and use them to spill
 32-bit values.
+
+--
+
+We might want to use 'j .+2' as a trap instruction, like gcc does.  It can
+also be made conditional like the return instruction, allowing us to utilize
+compare-and-trap and load-and-trap instructions.
+
+--
+
+We might want to use the 'overflow' condition to support
+llvm.sadd.with.overflow.i32 and related instructions - the generated code
+is currently quite bad.
+
+--
+
+SRDL/SRDA/SLDL could be modeled and used for multi-precision shifts.


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