[PATCH] D18903: [lanai] Add areMemAccessesTriviallyDisjoint, getMemOpBaseRegImmOfs and getMemOpBaseRegImmOfsWidth.

[Jacques Pienaar via llvm-commits]

jpienaar updated this revision to Diff 53188.
jpienaar added a comment.

Adding simple test case to verify effect on scheduling DAG due to areMemAccessesTriviallyDisjoint change.


http://reviews.llvm.org/D18903

Files:
  lib/Target/Lanai/LanaiInstrInfo.cpp
  lib/Target/Lanai/LanaiInstrInfo.h
  test/CodeGen/Lanai/lanai-misched-trivial-disjoint.ll

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