[PATCH] D18916: AMDGPU/SI: Fix regclass for the pseudo sgpr spill instructions
Tom Stellard via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 8 18:40:07 PDT 2016
tstellarAMD created this revision.
tstellarAMD added a reviewer: arsenm.
tstellarAMD added a subscriber: llvm-commits.
Herald added subscribers: arsenm, qcolombet.
The register class for these instructions needs to match the read/write
lane instrutions otherwise we can endup with illegal virtual registrs.
http://reviews.llvm.org/D18916
Files:
lib/Target/AMDGPU/SIInstrInfo.cpp
lib/Target/AMDGPU/SIInstructions.td
test/CodeGen/AMDGPU/sgpr-spill-regclass.ll
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