[PATCH] D7299: Prevent hoisting fmul from THEN/ELSE to IF if there is fmsub/fmadd opportunity

[Sebastian Pop via llvm-commits]

sebpop added inline comments.

================
Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:6540
@@ +6539,3 @@
+/// Not profitable if I and it's user can form a FMA instruction
+/// because we prefer FMSUB/FMADD.
+bool AArch64TargetLowering::isProfitableToHoist(Instruction *I) const {
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hulx2000 wrote:
> sebpop wrote:
> > I think that this is only avoiding a bigger issue, that is currently the instruction selection happens on a single basic block.
> > A better fix would be a machine pass that pairs multiplies with add/sub to form more FMAs.
> > 
> > 
> Could you please explain what do you mean about avoiding a bigger issue?
Instruction selection happens on a single basic block, and it cannot form FMAs across BBs.  The long term solution is to have an instruction selection that can see further than a BB.  Until then probably we could have an MI pass that matches FMAs across BB boundaries.


Repository:
  rL LLVM

http://reviews.llvm.org/D7299