[PATCH] D18866: [X86] Fix PR23155 by turning on X86FixupBWInsts by default

[Kevin B. Smith via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL265830: [X86] Fix PR23155 by turning on X86FixupBWInsts by default. (authored by kbsmith1).

Changed prior to commit:
  http://reviews.llvm.org/D18866?vs=52952&id=53055#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D18866

Files:
  llvm/trunk/lib/Target/X86/X86FixupBWInsts.cpp
  llvm/trunk/test/CodeGen/X86/anyext.ll
  llvm/trunk/test/CodeGen/X86/avx512bw-intrinsics.ll
  llvm/trunk/test/CodeGen/X86/merge-store-partially-alias-loads.ll

Index: llvm/trunk/test/CodeGen/X86/avx512bw-intrinsics.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/avx512bw-intrinsics.ll
+++ llvm/trunk/test/CodeGen/X86/avx512bw-intrinsics.ll
@@ -3565,7 +3565,7 @@
 ;
 ; AVX512F-32-LABEL: test_int_x86_avx512_mask_pbroadcast_w_gpr_512:
 ; AVX512F-32:       # BB#0:
-; AVX512F-32-NEXT:    movw {{[0-9]+}}(%esp), %ax
+; AVX512F-32-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
 ; AVX512F-32-NEXT:    kmovd {{[0-9]+}}(%esp), %k1
 ; AVX512F-32-NEXT:    vpbroadcastw %ax, %zmm0 {%k1}
 ; AVX512F-32-NEXT:    vpbroadcastw %ax, %zmm1 {%k1} {z}
Index: llvm/trunk/test/CodeGen/X86/anyext.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/anyext.ll
+++ llvm/trunk/test/CodeGen/X86/anyext.ll
@@ -30,7 +30,7 @@
 define i32 @bar(i32 %p, i16 zeroext %x) nounwind {
 ; X32-LABEL: bar:
 ; X32:       # BB#0:
-; X32-NEXT:    movw {{[0-9]+}}(%esp), %ax
+; X32-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
 ; X32-NEXT:    xorl %edx, %edx
 ; X32-NEXT:    divw {{[0-9]+}}(%esp)
 ; X32-NEXT:    andl $1, %eax
Index: llvm/trunk/test/CodeGen/X86/merge-store-partially-alias-loads.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/merge-store-partially-alias-loads.ll
+++ llvm/trunk/test/CodeGen/X86/merge-store-partially-alias-loads.ll
@@ -6,10 +6,10 @@
 ; they must not be placed on the same chain after merging.
 
 ; X86-LABEL: {{^}}merge_store_partial_overlap_load:
-; X86-DAG: movw ([[BASEREG:%[a-z]+]]), [[LO2:%[a-z]+]]
+; X86-DAG: movzwl ([[BASEREG:%[a-z]+]]), %e[[LO2:[a-z]+]]
 ; X86-DAG: movb 2([[BASEREG]]), [[HI1:%[a-z]+]]
 
-; X86-NEXT: movw [[LO2]], 1([[BASEREG]])
+; X86-NEXT: movw %[[LO2]], 1([[BASEREG]])
 ; X86-NEXT: movb [[HI1]], 3([[BASEREG]])
 ; X86-NEXT: retq
 
Index: llvm/trunk/lib/Target/X86/X86FixupBWInsts.cpp
===================================================================
--- llvm/trunk/lib/Target/X86/X86FixupBWInsts.cpp
+++ llvm/trunk/lib/Target/X86/X86FixupBWInsts.cpp
@@ -68,7 +68,7 @@
 static cl::opt<bool>
     FixupBWInsts("fixup-byte-word-insts",
                  cl::desc("Change byte and word instructions to larger sizes"),
-                 cl::init(false), cl::Hidden);
+                 cl::init(true), cl::Hidden);
 
 namespace {
 class FixupBWInstPass : public MachineFunctionPass {


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