[llvm] r265812 - [RegBankSelect] Use reverse post order traversal.
Quentin Colombet via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 8 10:19:11 PDT 2016
Author: qcolombet
Date: Fri Apr 8 12:19:10 2016
New Revision: 265812
URL: http://llvm.org/viewvc/llvm-project?rev=265812&view=rev
Log:
[RegBankSelect] Use reverse post order traversal.
When assigning the register banks of an instruction, it is best to know
all the constraints of the input to have a good idea of how this will
impact the cost of the whole function.
Modified:
llvm/trunk/lib/CodeGen/GlobalISel/RegBankSelect.cpp
Modified: llvm/trunk/lib/CodeGen/GlobalISel/RegBankSelect.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/RegBankSelect.cpp?rev=265812&r1=265811&r2=265812&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/RegBankSelect.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/RegBankSelect.cpp Fri Apr 8 12:19:10 2016
@@ -10,6 +10,7 @@
/// This file implements the RegBankSelect class.
//===----------------------------------------------------------------------===//
+#include "llvm/ADT/PostOrderIterator.h"
#include "llvm/CodeGen/GlobalISel/RegBankSelect.h"
#include "llvm/CodeGen/GlobalISel/RegisterBank.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
@@ -125,6 +126,12 @@ void RegBankSelect::assignInstr(MachineI
// This will not hold when we will consider alternative mappings.
DEBUG(dbgs() << "Assign: " << *ValMapping.BreakDown[0].RegBank << " to "
<< PrintReg(Reg) << '\n');
+ // For a definition, we may be changing the register bank silently
+ // for all the uses here.
+ // Although this will be correct when we do a RPO traversal of the
+ // basic block, because the only uses that could be affected are
+ // PHIs (i.e., copies), this may not be the best solution
+ // according to the cost model.
MRI->setRegBank(Reg, *ValMapping.BreakDown[0].RegBank);
MO.setReg(Reg);
}
@@ -135,8 +142,11 @@ bool RegBankSelect::runOnMachineFunction
DEBUG(dbgs() << "Assign register banks for: " << MF.getName() << '\n');
init(MF);
// Walk the function and assign register banks to all operands.
- for (MachineBasicBlock &MBB : MF)
- for (MachineInstr &MI : MBB)
+ // Use a RPOT to make sure all registers are assigned before we choose
+ // the best mapping of the current instruction.
+ ReversePostOrderTraversal<MachineFunction*> RPOT(&MF);
+ for (MachineBasicBlock *MBB : RPOT)
+ for (MachineInstr &MI : *MBB)
assignInstr(MI);
return false;
}
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