[PATCH] D16675: [mips] Expansion of SC[D] for pre-r6

[Vasileios Kalintiris via llvm-commits]

vkalintiris accepted this revision.
vkalintiris added a comment.
This revision is now accepted and ready to land.

LGTM with one comment inline.


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Comment at: lib/Target/Mips/AsmParser/MipsAsmParser.cpp:2630-2647
@@ -2616,9 +2629,20 @@
   unsigned RegOpNum = Inst.getOperand(0).getReg();
-  // 2nd operand is the base register.
+  bool IsSC = Inst.getOpcode() == Mips::SCD || Inst.getOpcode() == Mips::SC;
+  unsigned BaseRegNum;
   assert(Inst.getOperand(1).isReg() && "expected register operand kind");
-  unsigned BaseRegNum = Inst.getOperand(1).getReg();
-  // 3rd operand is either an immediate or expression.
+  BaseRegNum = Inst.getOperand(1).getReg();
+  if(IsSC) {
+    assert(Inst.getOperand(2).isReg() && "expected register operand kind");
+    BaseRegNum = Inst.getOperand(2).getReg();
+  }    
+  // The last operand is either an immediate or expression.
   if (isImmOpnd) {
-    assert(Inst.getOperand(2).isImm() && "expected immediate operand kind");
-    unsigned ImmOffset = Inst.getOperand(2).getImm();
+    unsigned ImmOffset;
+    if(IsSC) {
+      assert(Inst.getOperand(3).isImm() && "expected immediate operand kind");
+      ImmOffset = Inst.getOperand(3).getImm();
+    } else {
+      assert(Inst.getOperand(2).isImm() && "expected immediate operand kind");
+      ImmOffset = Inst.getOperand(2).getImm();
+    }
     unsigned LoOffset = ImmOffset & 0x0000ffff;
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It's not necessary for this patch, but if we use `IsSC` with the ternary operator `?:`, we could simplify the code and avoid the duplication by picking the correct operand number that we want to use.


http://reviews.llvm.org/D16675