[llvm] r265743 - [AArch64] Fix a typo in the register class to register bank mapping.

[Quentin Colombet via llvm-commits]

Author: qcolombet
Date: Thu Apr  7 18:10:14 2016
New Revision: 265743

URL: http://llvm.org/viewvc/llvm-project?rev=265743&view=rev
Log:
[AArch64] Fix a typo in the register class to register bank mapping.

For GPR family we want the GPR register bank, not FPR!

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64RegisterBankInfo.cpp

Modified: llvm/trunk/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64RegisterBankInfo.cpp?rev=265743&r1=265742&r2=265743&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64RegisterBankInfo.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64RegisterBankInfo.cpp Thu Apr  7 18:10:14 2016
@@ -102,7 +102,7 @@ const RegisterBank &AArch64RegisterBankI
   case AArch64::tcGPR64RegClassID:
   case AArch64::WSeqPairsClassRegClassID:
   case AArch64::XSeqPairsClassRegClassID:
-    return getRegBank(AArch64::FPRRegBankID);
+    return getRegBank(AArch64::GPRRegBankID);
   case AArch64::CCRRegClassID:
     return getRegBank(AArch64::CCRRegBankID);
   default: