[llvm] r265499 - AArch64CodeGen: Make AArch64RegisterBankInfo.cpp optional along LLVM_BUILD_GLOBAL_ISEL.
Quentin Colombet via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 6 09:16:46 PDT 2016
Hi Takumi,
I did a similar clean up further down my GobalISel local commits. That being said, this clean-up was not required as early, at least in my local setting, and as a result this commit does not play nice with my commit history.
Anyhow, my question is what is this commit fixing so that I can rework my commit history before moving along.
Thanks,
-Quentin
> On Apr 5, 2016, at 6:18 PM, NAKAMURA Takumi via llvm-commits <llvm-commits at lists.llvm.org> wrote:
>
> Author: chapuni
> Date: Tue Apr 5 20:18:08 2016
> New Revision: 265499
>
> URL: http://llvm.org/viewvc/llvm-project?rev=265499&view=rev
> Log:
> AArch64CodeGen: Make AArch64RegisterBankInfo.cpp optional along LLVM_BUILD_GLOBAL_ISEL.
>
> Modified:
> llvm/trunk/lib/Target/AArch64/CMakeLists.txt
>
> Modified: llvm/trunk/lib/Target/AArch64/CMakeLists.txt
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/CMakeLists.txt?rev=265499&r1=265498&r2=265499&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/AArch64/CMakeLists.txt (original)
> +++ llvm/trunk/lib/Target/AArch64/CMakeLists.txt Tue Apr 5 20:18:08 2016
> @@ -14,6 +14,18 @@ tablegen(LLVM AArch64GenSubtargetInfo.in
> tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler)
> add_public_tablegen_target(AArch64CommonTableGen)
>
> +set(GLOBAL_ISEL_FILES
> + AArch64RegisterBankInfo.cpp
> + )
> +
> +if(NOT LLVM_BUILD_GLOBAL_ISEL)
> + set(LLVM_OPTIONAL_SOURCES ${GLOBAL_ISEL_FILES})
> + set(GLOBAL_ISEL_FILES)
> +endif()
> +
> +
> +set(LLVM_OPTIONAL_SOURCES AArch64RegisterBankInfo.cpp)
> +
> add_llvm_target(AArch64CodeGen
> AArch64A57FPLoadBalancing.cpp
> AArch64AddressTypePromotion.cpp
> @@ -38,7 +50,6 @@ add_llvm_target(AArch64CodeGen
> AArch64MCInstLower.cpp
> AArch64PromoteConstant.cpp
> AArch64PBQPRegAlloc.cpp
> - AArch64RegisterBankInfo.cpp
> AArch64RegisterInfo.cpp
> AArch64SelectionDAGInfo.cpp
> AArch64StorePairSuppress.cpp
> @@ -46,6 +57,7 @@ add_llvm_target(AArch64CodeGen
> AArch64TargetMachine.cpp
> AArch64TargetObjectFile.cpp
> AArch64TargetTransformInfo.cpp
> + ${GLOBAL_ISEL_FILES}
> )
>
> add_dependencies(LLVMAArch64CodeGen intrinsics_gen)
>
>
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