[PATCH] D18049: AMDGPU i16 implementation
Tom Stellard via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 5 18:30:57 PDT 2016
tstellarAMD added a comment.
I tried to apply this patch, but I get a lot of failing lit tests in test/CodeGen/AMDGPU. Do all the tests in this directory pass for you?
================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:65
@@ -64,1 +64,3 @@
+ // TODO: Subtarget feature for i16
+ if (Subtarget->has16BitInsts())
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Do we still need this comment?
================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:1740
@@ -1683,3 +1739,3 @@
if (ExtType == ISD::NON_EXTLOAD && MemVT.getSizeInBits() < 32) {
- assert(MemVT == MVT::i1 && "Only i1 non-extloads expected");
+ //assert(MemVT == MVT::i1 && "Only i1 non-extloads expected");
// FIXME: Copied from PPC
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Does this need to be removed?
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Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:1748
@@ -1691,1 +1747,3 @@
+ EVT mem_vt = (MemVT == MVT::i1) ? MVT::i8 : MVT::i16;
+
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Coding style. Variable names should start with a captial.
Repository:
rL LLVM
http://reviews.llvm.org/D18049
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