[PATCH] D18751: [MachineCombiner] Support for floating-point FMA on ARM64

[Gerolf Hoflehner via llvm-commits]

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Hi James,

sure, sorry I missed that. I looked at this too long, I guess :-). It is principally the same ‘better ILP' story as for integers. The prototypical idea is this: imagine two fmul operands feeding the fadd. When the two fmul can execute in parallel it can be faster to issue fmul, fmul, fadd rather than fmul, fmadd.

Cheers
Gerolf


http://reviews.llvm.org/D18751