[PATCH] D17863: Swift Calling Convention: add swiftcc

Manman Ren via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 4 11:44:43 PDT 2016


manmanren added a comment.

In http://reviews.llvm.org/D17863#371104, @t.p.northover wrote:

> Hi Manman,
>
> I think the testing is too weak if we're going for ABI stability (particularly based on FastCC, which is explicitly called out in the LangRef as unstable and based on APCS). I'd actually strongly suggest Swift starts out with AAPCS_VFP on ARM.


I will update the ARM patch to base on AAPCS_VFP.

> Even with that, I'd suggest testing things like minimum stack slot size, alignment of objects on the stack, whether everything goes on the stack if something has. Probably on both iOS and WatchOS because I suspect those details differ based on type alignment.

> 

> For x86, you don't seem to test the new xmm registers at all.


For x86, added tests for xmm and i1.

Cheers,
Manman


================
Comment at: lib/Target/X86/X86CallingConv.td:196-199
@@ +195,6 @@
+def RetCC_X86_64_Swift : CallingConv<[
+  // For integers, ECX, R8D can be used as extra return registers.
+  CCIfType<[i8] , CCAssignToReg<[AL, DL, CL, R8B]>>,
+  CCIfType<[i16], CCAssignToReg<[AX, DX, CX, R8W]>>,
+  CCIfType<[i32], CCAssignToReg<[EAX, EDX, ECX, R8D]>>,
+  CCIfType<[i64], CCAssignToReg<[RAX, RDX, RCX, R8]>>,
----------------
Hi Tim,

i1 type is promoted to i8 before reaching here. That is why we don't need to handle i1 here.
This is what other RetCCs do, such as RetCC_X86_32_Fast, but I am not against making it explicit here.


http://reviews.llvm.org/D17863





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