[PATCH] D18593: [PowerPC] Front end improvements for vec_splat

[Nemanja Ivanovic via llvm-commits]

nemanjai added inline comments.

================
Comment at: test/CodeGen/ppc-vsx-splat.c:38
@@ +37,3 @@
+// CHECK-LE-LABEL: spltw0
+// CHECK: xxspltw {{[0-9]+}}, {{[0-9]+}}, 0
+// CHECK-LE: xxspltw {{[0-9]+}}, {{[0-9]+}}, 3
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@kbarton @echristo These tests check that we definitely have the right instruction, but they do not test that we do not have the branches. I can add some CHECK-NOT's or a check for the blr at the end of the function. Or I can add a test case to the back end portion (i.e. D18592).


Repository:
  rL LLVM

http://reviews.llvm.org/D18593