[PATCH] D18751: [MachineCombiner] Support for floating-point FMA on ARM64

[James Molloy via llvm-commits]

jmolloy added a subscriber: jmolloy.
jmolloy added a comment.

Hi Gerolf,

At a high level, could you please explain in what situations you expect *not* combining FMUL+FADD->FMA is a benefit? They use the same resource types on every chip I know of, and FMA is shorter in latency in every chip I know of than FMUL+FADD.

Cheers,

James


================
Comment at: include/llvm/CodeGen/MachineCombinerPattern.h:42
@@ +41,3 @@
+  MULSUBXI_OP1,
+  // Floating Point
+  FMULADDS_OP1,
----------------
For the future: the pattern list is starting to grow quite large. I wonder if in the future we should consider moving the MachineCombinerPatterns to be table-generated?


http://reviews.llvm.org/D18751