[PATCH] D18680: ARM, AArch64, X86: Check preserved registers for tail calls.

[Quentin Colombet via llvm-commits]

qcolombet added inline comments.

================
Comment at: lib/CodeGen/TargetRegisterInfo.cpp:397
@@ +396,3 @@
+      return false;
+  }
+  return true;
----------------
No braces.

================
Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:2882
@@ +2881,3 @@
+    if (!TRI->regmaskSubsetEqual(TRI->getCallPreservedMask(MF, CallerCC),
+                                 TRI->getCallPreservedMask(MF, CalleeCC)))
+      return false;
----------------
Isn’t sufficient to be inclusive?
I.e., CallerCC C= CalleeCC

================
Comment at: lib/Target/ARM/ARMISelLowering.cpp:2155
@@ +2154,3 @@
+    if (!TRI->regmaskSubsetEqual(TRI->getCallPreservedMask(MF, CallerCC),
+                                 TRI->getCallPreservedMask(MF, CalleeCC)))
+      return false;
----------------
Ditto

================
Comment at: test/CodeGen/AArch64/tailcall-ccmismatch.ll:5
@@ +4,3 @@
+declare void @somefunc()
+define preserve_mostcc void @test_ccmismatch_notail() {
+; CHECK-LABEL: test_ccmismatch_notail:
----------------
Add a comment on what you are testing here.

================
Comment at: test/CodeGen/ARM/cxx-tlscc.ll:130
@@ +129,3 @@
+declare void @somefunc()
+define cxx_fast_tlscc void @test_ccmismatch_notail() {
+; CHECK-LABEL: test_ccmismatch_notail:
----------------
Ditto


Repository:
  rL LLVM

http://reviews.llvm.org/D18680