[PATCH] D18572: [AArch64] Relax branches by fusing compare with conditional branch when we can infer that source register is zero/non-zero.

[Balaram Makam via llvm-commits]

bmakam added inline comments.

================
Comment at: lib/Target/AArch64/AArch64BranchRelaxation.cpp:510
@@ +509,3 @@
+          PI.getOperand(0).isUse() && PI.getOperand(0).getReg() == SrcReg2)
+        LastUse = Π
+    }
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bmakam wrote:
> t.p.northover wrote:
> > This seems wrong on 2 levels. First, if there are multiple predecessors then the fact that one of them ends in a TBZ says nothing about the contents of SrcReg2 coming from any others.
> > 
> > But even if that wasn't the case we really wouldn't want the logic to rely on the order MBB's predecessors happen to be returned in.
> I see your point now. I actually wanted to get the immediate dominator but the dom tree is not available in this pass without reconstructing. I will refactor this.
I am having difficulty in using the MachineDominatorTree in this pass even after reconstructing. When I call the DomTree->getNode API it crashes. The last user of MachineDomTree is MachineBlockPlacement pass. Is the DomTree invalid after MachineBlockPlacement? If this is the only way to get the immediate dominator then I am thinking of moving just this logic to an earlier pass. The interesting cases are found only after branchfolding so I am thinking  this should be done in PreSched2 stage. Is it reasonable to do it in a separate pass in PreSched2?


http://reviews.llvm.org/D18572