[PATCH] D18658: [AsmPrinter] Print aliases in topological order

[Tim Shen via llvm-commits]

timshen created this revision.
timshen added a reviewer: kbarton.
timshen added subscribers: echristo, iteratee, hfinkel, llvm-commits.

Print aliases in topological order, that is, for any alias a = b,
b must be printed before a. This is because on some targets (e.g. PowerPC)
linker expects aliases in such an order to generate correct TOC information.

For example, on PowerPC, GCC will produce following symbol:
~ % readelf -s tcmalloc_gcc.pic.o|grep '_Znam\b'
  1057: 00000000000001e4   100 FUNC    GLOBAL DEFAULT [<localentry>: 8]   508 _Znam
But LLVM without this change will produce:
~ % readelf -s tcmalloc_llvm.pic.o|grep '_Znam\b'
   870: 0000000000000000   100 FUNC    GLOBAL DEFAULT   94 _Znam

I'm not sure if it's the right change, since I don't know who is supposed to do this ordering.

http://reviews.llvm.org/D18658

Files:
  lib/CodeGen/AsmPrinter/AsmPrinter.cpp
  test/CodeGen/Generic/asm-printer-topological-order.ll

Index: test/CodeGen/Generic/asm-printer-topological-order.ll
===================================================================
--- /dev/null
+++ test/CodeGen/Generic/asm-printer-topological-order.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s | FileCheck %s
+
+ at TestA = alias void (), void ()* @TestC
+ at TestB = alias void (), void ()* @TestC
+ at TestC = alias void (), void ()* @TestD
+
+define void @TestD() {
+entry:
+  ret void
+}
+
+; CHECK-LABEL: TestD:
+; CHECK: TestC = TestD
+; CHECK-DAG: TestB = TestC
+; CHECK-DAG: TestA = TestC
Index: lib/CodeGen/AsmPrinter/AsmPrinter.cpp
===================================================================
--- lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -1148,7 +1148,7 @@
   }
 
   OutStreamer->AddBlankLine();
-  for (const auto &Alias : M.aliases()) {
+  const auto printAlias = [this, &M](const GlobalAlias &Alias) {
     MCSymbol *Name = getSymbol(&Alias);
 
     if (Alias.hasExternalLinkage() || !MAI->getWeakRefDirective())
@@ -1186,6 +1186,26 @@
       OutStreamer->emitELFSize(cast<MCSymbolELF>(Name),
                                MCConstantExpr::create(Size, OutContext));
     }
+  };
+  // Print aliases in topological order, that is, for each alias a = b,
+  // b must be printed before a.
+  // This is because on some targets (e.g. PowerPC) linker expects aliases in
+  // such an order to generate correct TOC information.
+  SmallVector<const GlobalAlias *, 16> AliasStack;
+  SmallPtrSet<const GlobalAlias *, 16> AliasVisited;
+  for (const auto &Alias : M.aliases()) {
+    for (const GlobalAlias *Cur = &Alias; Cur;
+         Cur = dyn_cast<GlobalAlias>(Cur->getAliasee())) {
+      if (AliasVisited.insert(Cur).second) {
+        AliasStack.push_back(Cur);
+      } else {
+        break;
+      }
+    }
+    for (const GlobalAlias *AncestorAlias : reverse(AliasStack)) {
+      printAlias(*AncestorAlias);
+    }
+    AliasStack.clear();
   }
 
   GCModuleInfo *MI = getAnalysisIfAvailable<GCModuleInfo>();


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