[PATCH] D18650: [X86] Introduction of a new CPU Lakemont

[Andrey Turetskiy via llvm-commits]

aturetsk created this revision.
aturetsk added reviewers: nadav, echristo, bruno.
aturetsk added subscribers: llvm-commits, zinovy.nis.

Add a new CPU Lakemont which doesn't support X87.

http://reviews.llvm.org/D18650

Files:
  lib/Target/X86/X86.td
  test/CodeGen/X86/lakemont-soft-fp.ll

Index: test/CodeGen/X86/lakemont-soft-fp.ll
===================================================================
--- /dev/null
+++ test/CodeGen/X86/lakemont-soft-fp.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86 -mcpu=lakemont | FileCheck %s
+
+; Make sure -mcpu=lakemont implies soft floats.
+define float @test(float %a, float %b) nounwind readnone {
+; CHECK-LABEL: test:
+; CHECK: __addsf3
+  %add = fadd float %a, %b
+  ret float %add
+}
Index: lib/Target/X86/X86.td
===================================================================
--- lib/Target/X86/X86.td
+++ lib/Target/X86/X86.td
@@ -283,6 +283,9 @@
 def : Proc<"pentium4m",       [FeatureX87, FeatureSlowUAMem16, FeatureMMX,
                                FeatureSSE2, FeatureFXSR, FeatureSlowBTMem]>;
 
+// Intel Quark.
+def : Proc<"lakemont",        []>;
+
 // Intel Core Duo.
 def : ProcessorModel<"yonah", SandyBridgeModel,
                      [FeatureX87, FeatureSlowUAMem16, FeatureMMX, FeatureSSE3,


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