[PATCH] D14807: AMDGPU: Implement SIRegisterInfo::getRegPressureSetScore()

[Tom Stellard via llvm-commits]

tstellarAMD updated this revision to Diff 52158.
tstellarAMD added a comment.

With my recent scheduler change, this patch shows improvements again, especially
with Max Waves.

16429 shaders in 3231 tests
Totals:
SGPRS: 311488 -> 308360 (-1.00 %)
VGPRS: 209002 -> 207986 (-0.49 %)
Code Size: 7183656 -> 7297532 (1.59 %) bytes
LDS: 83 -> 83 (0.00 %) blocks
Scratch: 1600512 -> 4276224 (167.18 %) bytes per wave
Max Waves: 49208 -> 50252 (2.12 %)
Wait states: 0 -> 0 (0.00 %)


http://reviews.llvm.org/D14807

Files:
  lib/Target/AMDGPU/SIRegisterInfo.cpp
  lib/Target/AMDGPU/SIRegisterInfo.h

Index: lib/Target/AMDGPU/SIRegisterInfo.h
===================================================================
--- lib/Target/AMDGPU/SIRegisterInfo.h
+++ lib/Target/AMDGPU/SIRegisterInfo.h
@@ -51,6 +51,9 @@
   unsigned getRegPressureSetLimit(const MachineFunction &MF,
                                   unsigned Idx) const override;
 
+  unsigned getRegPressureSetScore(const MachineFunction &MF,
+                                  unsigned PSetID) const override;
+
   bool requiresRegisterScavenging(const MachineFunction &Fn) const override;
 
   bool requiresFrameIndexScavenging(const MachineFunction &MF) const override;
Index: lib/Target/AMDGPU/SIRegisterInfo.cpp
===================================================================
--- lib/Target/AMDGPU/SIRegisterInfo.cpp
+++ lib/Target/AMDGPU/SIRegisterInfo.cpp
@@ -187,6 +187,25 @@
   return VGPRLimit;
 }
 
+unsigned SIRegisterInfo::getRegPressureSetScore(const MachineFunction &MF,
+                                                    unsigned PSetID) const {
+
+  if (SGPRPressureSets.test(PSetID)) {
+    if (VGPRPressureSets.test(PSetID)) {
+      // If a pressure set contains vgprs and sgprs then we prefer incresing
+      // its pressure over regular register classes.  This has the hightest
+      // score.
+      return 2;
+    }
+    // If this is an SGPR pressure set we prefer increasing its pressure
+    // over VGPR pressure sets.
+    return 1;
+  }
+
+  // VGPRS.
+  return 0;
+}
+
 bool SIRegisterInfo::requiresRegisterScavenging(const MachineFunction &Fn) const {
   return Fn.getFrameInfo()->hasStackObjects();
 }


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