[PATCH] D17306: DAGCombiner: Relax alignment restriction when changing load type

[Elena Demikhovsky via llvm-commits]

delena added inline comments.

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:1356
@@ -1355,1 +1355,3 @@
 
+    setOperationAction(ISD::LOAD, MVT::v8i1, Promote);
+    AddPromotedToType(ISD::LOAD, MVT::v8i1, MVT::i8);
----------------
I checked now. There is a bug in AVX-512, but let me fix it. I'll do this, probably, in a different way and add tests. It should not take more than one day..
Thank you for pointing on this.


http://reviews.llvm.org/D17306